Issued Patents All Time
Showing 51–75 of 168 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9733987 | Techniques to dynamically allocate resources of configurable computing resources | Andrew J. Herdrich, Kapil Sood, Nrupal Jani, Mesut A. Ergin, Scott P. Dubal +1 more | 2017-08-15 |
| 9736071 | General input/output architecture, protocol and related methods to implement flow control | Jasmin Ajanovic, Blaise Fanning, David M. Lee | 2017-08-15 |
| 9715269 | Platform communication protocol | Seh Kwa, Neil W. Songer, Rob Gough | 2017-07-25 |
| 9710406 | Data transmission using PCIe protocol via USB port | Akshay G. Pethe, Mahesh Wagh, Abdul Ismail | 2017-07-18 |
| 9602408 | General input/output architecture, protocol and related methods to implement flow control | Jasmin Ajanovic, Blaise Fanning, David M. Lee | 2017-03-21 |
| 9565106 | General input/output architecture, protocol and related methods to implement flow control | Jasmin Ajanovic, Blaise Fanning, David M. Lee | 2017-02-07 |
| 9558145 | Method, apparatus and system for measuring latency in a physical unit of a circuit | Mahesh Wagh, Abdul R. Ismail, Daniel S. Froelich | 2017-01-31 |
| 9535838 | Atomic operations in PCI express | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, Mark Rosenbluth +13 more | 2017-01-03 |
| 9524265 | Providing a serial protocol for a bidirectional serial interconnect | Jeff C. Morriss | 2016-12-20 |
| 9495303 | Fine grained address remapping for virtualization | — | 2016-11-15 |
| 9442855 | Transaction layer packet formatting | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, Mark Rosenbluth +13 more | 2016-09-13 |
| 9432456 | Mechanism for clock synchronization | Kevin B. Stanton | 2016-08-30 |
| 9396151 | PCI express tunneling over a multi-protocol I/O interconnect | Maxim Dan | 2016-07-19 |
| 9367116 | Apparatus to reduce idle link power in a platform | Paul S. Diefenbaugh, Robert E. Gough, Yuval Bachrach, Mikal C. Hunsaker, Rafi Ben-Tal +2 more | 2016-06-14 |
| 9280198 | Method and apparatus to reduce idle link power in a platform | Paul S. Diefenbaugh, Robert E. Gough, Yuval Bachrach, Mikal C. Hunsaker, Rafi Ben-Tal +2 more | 2016-03-08 |
| 9280510 | Inter-chip communications with link layer interface and protocol adaptor | Sridharan Ranganathan, Anoop Mukker, Satheesh Chellappan, Karthi R. Vadivelu, Shalini Sharma +1 more | 2016-03-08 |
| 9262347 | Method, apparatus and system for measuring latency in a physical unit of a circuit | Mahesh Wagh, Abdul R. Ismail, Daniel S. Froelich | 2016-02-16 |
| 9223735 | Providing a consolidated sideband communication channel between devices | Mahesh Wagh, Robert E. Gough, James E. Jaussi | 2015-12-29 |
| 9203598 | Asymmetric link for streaming applications | Huimin Chen, Duane G. Quiet | 2015-12-01 |
| 9141577 | Optimized link training and management mechanism | Mahesh Wagh | 2015-09-22 |
| 9128811 | Assigning addresses to devices on an interconnect | Jeff C. Morriss | 2015-09-08 |
| 9098415 | PCI express transaction descriptor | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, Mark Rosenbluth +13 more | 2015-08-04 |
| 9088495 | General input/output architecture, protocol and related methods to implement flow control | Jasmin Ajanovic, Blaise Fanning, David M. Lee | 2015-07-21 |
| 9071528 | General input/output architecture, protocol and related methods to implement flow control | Jasmin Ajanovic, Blaise Fanning, David M. Lee | 2015-06-30 |
| 9049125 | General input/output architecture, protocol and related methods to implement flow control | Jasmin Ajanovic, Blaise Fanning, David M. Lee | 2015-06-02 |