Issued Patents All Time
Showing 51–75 of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7436210 | Next generation 8B10B architecture | Ramanand Venkata, Rakesh Patel | 2008-10-14 |
| 7397270 | Dynamically-adjustable differential output drivers | Mei Luo, Sergey Shumarayev, Wilson Wong | 2008-07-08 |
| 7386347 | Electric stimilator for alpha-wave derivation | Jong-Pil Chung, Sung-Min Kang, Ye-Won Kim | 2008-06-10 |
| 7386767 | Programmable bit error rate monitor for serial interface | Ning Xue | 2008-06-10 |
| 7366267 | Clock data recovery with double edge clocking based phase detector and serializer/deserializer | Ramanand Venkata | 2008-04-29 |
| 7362833 | Dynamic special character selection for use in byte alignment circuitry | Vinson Chan, Rakesh Patel, Ramanand Venkata | 2008-04-22 |
| 7343569 | Apparatus and method for reset distribution | John Lam, Arch Zaliznyak, Rakesh Patel, Vinson Chan | 2008-03-11 |
| 7333570 | Clock data recovery circuitry associated with programmable logic device circuitry | Edward Aung, Henry Y. Lui, Paul Butler, John E. Turner, Rakesh Patel | 2008-02-19 |
| 7310399 | Clock signal circuitry for multi-protocol high-speed serial interface circuitry | Ramanand Venkata | 2007-12-18 |
| 7305058 | Multi-standard clock rate matching circuitry | Ramanand Venkata | 2007-12-04 |
| 7292070 | Programmable PPM detector | Seungmyon Park, Ramanand Venkata | 2007-11-06 |
| 7272677 | Multi-channel synchronization for programmable logic device serial interface | Ramanand Venkata, Rakesh Patel | 2007-09-18 |
| 7268582 | DPRIO for embedded hard IP | Michael Zheng, Binh Ton | 2007-09-11 |
| 7259699 | Circuitry for providing configurable running disparity enforcement in 8B/10B encoding and error detection | Ning Xue | 2007-08-21 |
| 7227918 | Clock data recovery circuitry associated with programmable logic device circuitry | Edward Aung, Henry Y. Lui, Paul Butler, John E. Turner, Rakesh Patel | 2007-06-05 |
| 7199732 | Data converter with reduced component count for padded-protocol interface | Ning Xue | 2007-04-03 |
| 7183797 | Next generation 8B10B architecture | Ramanand Venkata, Rakesh Patel | 2007-02-27 |
| 7180972 | Clock signal circuitry for multi-protocol high-speed serial interface circuitry | Ramanand Venkata | 2007-02-20 |
| 7162553 | Correlating high-speed serial interface data and FIFO status signals in programmable logic devices | Ning Xue | 2007-01-09 |
| 7151470 | Data converter with multiple conversions for padded-protocol interface | Ning Xue, Ramanand Venkata, Rakesh Patel | 2006-12-19 |
| 7151397 | Voltage controlled oscillator programmable delay cells | Stjepan Andrasic, Rakesh Patel | 2006-12-19 |
| 7138837 | Digital phase locked loop circuitry and methods | Ramanand Venkata, Henry Y. Lui | 2006-11-21 |
| 7131024 | Multiple transmit data rates in programmable logic device serial interface | Ramanand Venkata, Rakesh Patel | 2006-10-31 |
| 7095340 | Run-length violation detection circuitry and methods for using the same | Vinson Chan, Huy Ngo | 2006-08-22 |
| 7088133 | Programmable logic device with high speed serial interface circuitry | Reza Asayesh | 2006-08-08 |