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Been-Jon Woo — 17 Patents

Intel: 14 patents #2,935 of 30,777Top 10%
GMGrace Semiconductor Manufacturing: 1 patents #12 of 36Top 35%
Saratoga, CA: #565 of 2,933 inventorsTop 20%
California: #35,467 of 386,348 inventorsTop 10%
Overall (All Time): #263,971 of 4,157,543Top 7%
17 Patents All Time
Been-Jon Woo has been granted 17 US patents while listed as an inventor at Intel. The first was granted in 1988 and the most recent in December 2009. Been-Jon Woo ranks #263,971 of 4,157,543 US inventors in our database (top 6.3%). Patent records list Been-Jon Woo in Saratoga, CA, US.

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
7632736 Self-aligned contact formation utilizing sacrificial polysilicon Max Wei 2009-12-15 $24,562,000
7465625 Flash memory cell having reduced floating gate to floating gate coupling Yudong Kim, Albert Fazio 2008-12-16
7348618 Flash memory cell having reduced floating gate to floating gate coupling Yudong Kim, Albert Fazio 2008-03-25 $11,219,000
7015149 Simplified dual damascene process 2006-03-21
5470772 Silicidation method for contactless EPROM related devices 1995-11-28 $29,998,000
5229631 Erase performance improvement via dual floating gate processing 1993-07-20 $88,009,000
5210047 Process for fabricating a flash EPROM having reduced cell size Gregory E. Atwood, Stefan Lai, T. C. Ong 1993-05-11
5196361 Method of making source junction breakdown for devices with source-side erasing Tong-Chern Ong 1993-03-23 $68,526,000
5147813 Erase performance improvement via dual floating gate processing 1992-09-15 $37,767,000
5102814 Method for improving device scalability of buried bit line flash EPROM devices having short reoxidation beaks and shallower junctions 1992-04-07 $28,745,000
5077230 Method for improving erase characteristics of buried bit line flash EPROM devices by use of a thin nitride layer formed during field oxide growth Mark A. Holler 1991-12-31 $48,446,000
5075245 Method for improving erase characteristics of buried bit line flash EPROM devices without using sacrificial oxide growth and removal steps Mark A. Holler 1991-12-24 $18,350,000
4833099 Tungsten-silicide reoxidation process including annealing in pure nitrogen and subsequent oxidation in oxygen 1989-05-23 $50,574,000
4784965 Source drain doping technique Mark A. Holler, Ender Hokeler, Sandra S. Lee 1988-11-15 $9,472,000
4774201 Tungsten-silicide reoxidation technique using a CVD oxide cap Wei-Jen Lo 1988-09-27 $58,029,000
4757026 Source drain doping technique Mark A. Holler, Ender Hokelek, Sandra S. Lee 1988-07-12 $34,993,000
4728617 Method of fabricating a MOSFET with graded source and drain regions Mark A. Holler, Ender Hokelek, Sandra S. Lee 1988-03-01 $30,751,000