Issued Patents All Time
Showing 26–49 of 49 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9165647 | Multistage memory cell read | Sandeep Guliani, Kiran Pangal, Chaohong Hu | 2015-10-20 |
| 9142271 | Reference architecture in a cross-point memory | Doyle Rivers, Derchang Kau, Matthew Goldman | 2015-09-22 |
| 9092401 | System and methods for detecting genetic variation | Hunter Richards, Eric Andrew Evans, Subramaniam Srinivasan, Abhik Shah, A. Scott Patterson +1 more | 2015-07-28 |
| 8775571 | Methods, systems, and computer program products for dynamic network access device port and user device configuration for implementing device-based and user-based policies | Desikan Saravanan, Nick G. Suizo, Rajasekaran Nagarajan, Jeffrey Ronne, Abhay Gidwani +1 more | 2014-07-08 |
| 8775309 | Method and apparatus for pricing calculation | Victor Chau, Doug Hoople, Timothy Leung, Kirsty Nuttall, Muralidhar Ravuri +3 more | 2014-07-08 |
| 8547777 | Nor logic word line selection | Swaroop Ghosh, Dinesh Somasekhar, Fatih Hamzaoglu | 2013-10-01 |
| 8456946 | NAND logic word line selection | Swaroop Ghosh, Dinesh Somasekhar, Fatih Hamzaoglu | 2013-06-04 |
| 8406073 | Hierarchical DRAM sensing | Dinesh Somasekhar, Gunjan H. Pandya, Kevin X. Zhang, Fatih Hamzaoglu, Swaroop Ghosh +1 more | 2013-03-26 |
| 8165959 | Method and apparatus for pricing calculation | Victor Chau, Doug Hoople, Timothy Leung, Kirsty Nuttall, Muralidhar Ravuri +3 more | 2012-04-24 |
| 7577996 | Apparatus, method and system for improving network security | Shehzad Merchant, Derek H. Pitcher, Victor C. Lin, Manish Rathi, Jia-Ru Li +3 more | 2009-08-18 |
| 7310664 | Unified, configurable, adaptive, network architecture | Shehzad Merchant, Manish Rathi, Victor C. Lin, Vipin Jain, Jia-Ru Li +3 more | 2007-12-18 |
| 7304889 | Serially sensing the output of multilevel cell arrays | Matthew Goldman, Hernan A. Castro | 2007-12-04 |
| 7116597 | High precision reference devices and methods | Matthew Goldman, Kerry D. Tedrow, Paul D. Ruby | 2006-10-03 |
| 7106626 | Serially sensing the output of multilevel cell arrays | Matthew Goldman, Hernan A. Castro | 2006-09-12 |
| 6831862 | Method and apparatus for matched-reference sensing architecture for non-volatile memories | Kerry D. Tedrow, Owen W. Jungroth | 2004-12-14 |
| 6717856 | Method and apparatus for sen-ref equalization | Sandeep Guliani | 2004-04-06 |
| 6570789 | Load for non-volatile memory drain bias | Ritesh B. Trivedi, Robert Baltar, Mark E. Bauer, Sandeep Guliani | 2003-05-27 |
| 6535423 | Drain bias for non-volatile memory | Ritesh B. Trivedi, Robert Baltar, Mark E. Bauer, Sandeep Guliani | 2003-03-18 |
| 6515906 | Method and apparatus for matched-reference sensing architecture for non-volatile memories | Kerry D. Tedrow, Owen W. Jungroth | 2003-02-04 |
| 6477086 | Local sensing of non-volatile memory | Ritesh B. Trivedi, Mark E. Bauer, Sandeep Guliani, Kerry D. Tedrow | 2002-11-05 |
| 6442069 | Differential signal path for high speed data transmission in flash memory | Robert Baltar, Ritesh B. Trivedi | 2002-08-27 |
| 6434049 | Sample and hold voltage reference source | Ritesh B. Trivedi, Robert Baltar, Mark E. Bauer, Sandeep Guliani | 2002-08-13 |
| 6392989 | High speed protection switching in label switched networks through pre-computation of alternate routes | Paul Jardetzky, Jaroslaw J. Sydir | 2002-05-21 |
| 6046998 | ATM reference traffic system | Raymond Douglas Niehaus, Vinai Sirkay, William Lee Edwards, Timothy Gene Kelley | 2000-04-04 |