AM

Amit Merchant

IN Intel: 33 patents #1,094 of 30,777Top 4%
IBM: 2 patents #32,839 of 70,183Top 50%
LP Lenovo (Singapore) Pte.: 2 patents #296 of 1,012Top 30%
KY Kyndryl: 1 patents #287 of 874Top 35%
📍 Citrus Heights, CA: #2 of 237 inventorsTop 1%
🗺 California: #12,236 of 386,348 inventorsTop 4%
Overall (All Time): #86,083 of 4,157,543Top 3%
38
Patents All Time

Issued Patents All Time

Showing 26–38 of 38 patents

Patent #TitleCo-InventorsDate
5875467 Method and apparatus for maintaining cache coherency in a computer system with a highly pipelined bus and multiple conflicting snoop requests 1999-02-23
5797026 Method and apparatus for self-snooping a bus during a boundary transaction Michael W. Rhodehamel, Nitin V. Sarangdhar, Matthew A. Fisch, James M. Brayton 1998-08-18
5778438 Method and apparatus for maintaining cache coherency in a computer system with a highly pipelined bus and multiple conflicting snoop requests 1998-07-07
5737759 Method and apparatus for maintaining cache coherency in a computer system with a highly pipelined bus and multiple conflicting snoop requests 1998-04-07
5737758 Method and apparatus for maintaining cache coherency in a computer system with a highly pipelined bus and multiple conflicting snoop requests 1998-04-07
5682516 Computer system that maintains system wide cache coherency during deferred communication transactions Nitin V. Sarangdhar, Wen-Han Wang, Michael W. Rhodehamel, James M. Brayton, Matthew A. Fisch 1997-10-28
5572703 Method and apparatus for snoop stretching using signals that convey snoop results Peter D. MacWilliams, Nitin V. Sarangdhar, Matthew A. Fisch 1996-11-05
5572702 Method and apparatus for supporting read, write, and invalidation operations to memory which maintain cache consistency Nitin V. Sarangdhar, Michael W. Rhodehamel, Matthew A. Fisch, James M. Brayton 1996-11-05
5537357 Method for preconditioning a nonvolatile memory array Mickey L. Fandrich, Geoffrey Gould 1996-07-16
5377147 Method and circuitry for preconditioning shorted rows in a nonvolatile semiconductor memory incorporating row redundancy Mickey L. Fandrich, Neal R. Mielke 1994-12-27
5347489 Method and circuitry for preconditioning shorted rows in a nonvolatile semiconductor memory incorporating row redundancy Mickey L. Fandrich, Neal R. Mielke 1994-09-13
5327383 Method and circuitry for erasing a nonvolatile semiconductor memory incorporating row redundancy Mickey L. Fandrich, Neal R. Mielke 1994-07-05
5237535 Method of repairing overerased cells in a flash memory Neal R. Mielke, Gregory E. Atwood 1993-08-17