Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6378061 | Apparatus for issuing instructions and reissuing a previous instructions by recirculating using the delay circuit | Glenn J. Hinton, Frank S. Smith | 2002-04-23 |
| 6055656 | Control register bus access through a standardized test access port | James A. Wilson, Anthony C. Miller, Michael W. Rhodehamel, Derek B. Feltham, Sumeet Agrawal | 2000-04-25 |
| 5758116 | Instruction length decoder for generating output length indicia to identity boundaries between variable length instructions | Chan Woo Lee, Gary L. Brown, Ashwani K. Gupta | 1998-05-26 |
| 5673427 | Packing valid micro operations received from a parallel decoder into adjacent locations of an output queue | Gary L. Brown, Donald D. Parker | 1997-09-30 |
| 5668985 | Decoder having a split queue system for processing intstructions in a first queue separate from their associated data processed in a second queue | Gary L. Brown, Bradley D. Hoyt, Donald D. Parker, Rajesh Kumar | 1997-09-16 |
| 5630083 | Decoder for decoding multiple instructions in parallel | Gary L. Brown, Donald D. Parker | 1997-05-13 |
| 5253255 | Scan mechanism for monitoring the state of internal signals of a VLSI microprocessor chip | — | 1993-10-12 |
| 5222244 | Method of modifying a microinstruction with operands specified by an instruction held in an alias register | Frank S. Smith | 1993-06-22 |