Jason Z. Mo — 27 Patents at Integrated Device Technology

Jason Z. Mo has been granted 27 US patents while listed as an inventor at Integrated Device Technology. The first was granted in 2006 and the most recent in December 2015. Jason Z. Mo ranks #142,059 of 4,157,543 US inventors in our database (top 3.4%). Patent records list Jason Z. Mo in Fremont, CA, US.

Issued Patents All Time

Showing 1–25 of 27 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
9203769	Method and apparatus for congestion and fault management with time-to-live	Chi-Lie Wang	2015-12-01	$17,331,000
8902765	Method and apparatus for congestion and fault management with time-to-live	Chi-Lie Wang	2014-12-02	$28,625,000
8850089	Method and apparatus for unified final buffer with pointer-based and page-based scheme for traffic optimization	Chi-Lie Wang	2014-09-30	$10,479,000
8625621	Method to support flexible data transport on serial protocols	Chi-Lie Wang	2014-01-07	$5,028,000
8571050	Method and apparatus to optimize class of service under multiple VCs with mixed reliable transfer and continuous transfer modes	Chi-Lie Wang, Ming-Shiung Chen	2013-10-29	$5,721,000
8325723	Method and apparatus for dynamic traffic management with packet classification	Chi-Lie Wang	2012-12-04	$2,355,000
8320392	Method and apparatus for programmable buffer with dynamic allocation to optimize system throughput with deadlock avoidance on switches	Chi-Lie Wang	2012-11-27	$2,304,000
8312190	Protocol translation in a serial buffer	Chi-Lie Wang	2012-11-13	$3,102,000
8312241	Serial buffer to support request packets with out of order response packets	Chi-Lie Wang	2012-11-13	$3,102,000
8254399	Method and apparatus for adaptive buffer management for traffic optimization on switches	Chi-Lie Wang	2012-08-28	$2,066,000
8238339	Method and apparatus for selective packet discard	Chi-Lie Wang	2012-08-07	$2,230,000
8230174	Multi-queue address generator for start and end addresses in a multi-queue first-in first-out memory system	Mario Au, Xiaoping Fang	2012-07-24	$5,829,000
8213448	Method to support lossless real time data sampling and processing on rapid I/O end-point	Chi-Lie Wang, Calvin Nguyen, Bertan Tezcan	2012-07-03	$3,346,000
7944876	Time slot interchange switch with bit error rate testing	—	2011-05-17	$4,580,000
7870310	Multiple counters to relieve flag restriction in a multi-queue first-in first-out memory system	Mario Au	2011-01-11	$3,604,000
7870313	Method and structure to support system resource access of a serial device implementating a lite-weight protocol	Chi-Lie Wang, Calvin Nguyen	2011-01-11	$3,604,000
7818470	Adaptive interrupt on serial rapid input/output (SRIO) endpoint	Chi-Lie Wang, Bertan Tezcan	2010-10-19	$2,105,000
7805552	Partial packet write and write data filtering in a multi-queue first-in first-out memory system	Mario Au, Hui Su	2010-09-28	$3,306,000
7805551	Multi-function queue to support data offload, protocol translation and pass-through FIFO	Chi-Lie Wang, Mario Au	2010-09-28	$3,306,000
7617346	Rapid input/output doorbell coalescing to minimize CPU utilization and reduce system interrupt latency	Chi-Lie Wang, Kwong Hou Mak	2009-11-10	$4,744,000
7523232	Mark/re-read and mark/re-write operations in a multi-queue first-in first-out memory system	Mario Au	2009-04-21	$2,562,000
7447812	Multi-queue FIFO memory devices that support flow-through of write and read counter updates using multi-port flag counter register files	Prashant Shamarao, Jianghui Su	2008-11-04	$8,904,000
7392354	Multi-queue FIFO memory devices that support a backed-off standard mode of operation and methods of operating same	Mario Au	2008-06-24	$6,740,000
7269700	Status bus accessing only available quadrants during loop mode operation in a multi-queue first-in first-out memory system	Mario Au, Cheng-Han Wu	2007-09-11	$8,718,000
7257687	Synchronization of active flag and status bus flags in a multi-queue first-in first-out memory system	Mario Au, Cheng-Han Wu	2007-08-14	$9,640,000

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Jason Z. Mo — 27 Patents

Issued Patents All Time

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