Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Multi-queue address generator for start and end addresses in a multi-queue first-in first-out memory system

Multi-queue address generator for start and end addresses in a multi-queue first-in first-out memory system

US Patent 8230174 · Granted Jul 24, 2012

Estimated economic value: $5,829,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Method and apparatus for congestion and fault management with time-to-live2015
Method and apparatus for congestion and fault management with time-to-live2014
Method and apparatus for unified final buffer with pointer-based and page-based 2014
Method to support flexible data transport on serial protocols2014
Method and apparatus to optimize class of service under multiple VCs with mixed 2013
Method and apparatus for dynamic traffic management with packet classification2012
Method and apparatus for programmable buffer with dynamic allocation to optimize2012
Protocol translation in a serial buffer2012
Serial buffer to support request packets with out of order response packets2012
Method and apparatus for adaptive buffer management for traffic optimization on 2012
Method and apparatus for selective packet discard2012
Method to support lossless real time data sampling and processing on rapid I/O e2012