Issued Patents All Time
Showing 26–50 of 153 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7706113 | Electrical overstress (EOS) and electrostatic discharge (ESD) protection circuit and method of use | Ta-Ke Tien | 2010-04-27 |
| 7644311 | Logic soft error rate prediction and improvement | Pao-Lu Louis Huang | 2010-01-05 |
| 7602226 | Method and apparatus for clock generation | Frank Hwang, Howard Yang, Jimmy Lee | 2009-10-13 |
| 7582567 | Method for forming CMOS device with self-aligned contacts and region formed using salicide process | Tsengyou Syau, Shih-Ked Lee | 2009-09-01 |
| 7560800 | Die seal with reduced noise coupling | Shih-Ked Lee | 2009-07-14 |
| 7545660 | Method and apparatus for CAM with reduced cross-coupling interference | Chau-Chin Wu | 2009-06-09 |
| 7522438 | Method and apparatus for CAM with reduced cross-coupling interference | Chau-Chin Wu | 2009-04-21 |
| 7499303 | Binary and ternary non-volatile CAM | Shih-Ked Lee | 2009-03-03 |
| 7474011 | Method for improved single event latch up resistance in an integrated circuit | Ta-Ke Tien, Pao-Lu Louis Huang | 2009-01-06 |
| 7443747 | Memory array bit line coupling capacitor cancellation | Tzong-Kwang Henry Yeh | 2008-10-28 |
| 7414460 | System and method for integrated circuit charge recycling | Chau-Chin Wu, Tzong-Kwang Henry Yeh | 2008-08-19 |
| 7408751 | Self-biased electrostatic discharge protection method and circuit | Shih-Ked Lee | 2008-08-05 |
| 7304875 | Content addressable memory (CAM) devices that support background BIST and BISR operations and methods of operating same | Michael J. Miller, Chau-Chin Wu, Kee Park, Scott Yu-Fan Chu | 2007-12-04 |
| 7286438 | Dual port memory cell with reduced coupling capacitance and small cell size | Pao-Lu Louis Huang | 2007-10-23 |
| 7248492 | Method and apparatus for CAM with reduced cross-coupling interference | Chau-Chin Wu | 2007-07-24 |
| 7214990 | Memory cell with reduced soft error rate | Shih-Ked Lee, Louis Huang, Gaolong Jin, Wanqing Cao, Guo-Qiang Lo | 2007-05-08 |
| 7187571 | Method and apparatus for CAM with reduced cross-coupling interference | Chau-Chin Wu | 2007-03-06 |
| 7176738 | Method and apparatus for clock generation | Frank Hwang, Howard Yang, Jimmy Lee | 2007-02-13 |
| 7102862 | Electrostatic discharge protection circuit | Ta-Ke Tien | 2006-09-05 |
| 7098114 | Method for forming cmos device with self-aligned contacts and region formed using salicide process | Tsengyou Syau, Shih-Ked Lee | 2006-08-29 |
| RE39227 | Content addressable memory (CAM) arrays and cells having low power requirements | Chau-Chin Wu | 2006-08-08 |
| 7050317 | Content addressable memory (CAM) devices that support power saving longest prefix match operations and methods of operating same | Kee Park, Scott Yu-Fan Chu | 2006-05-23 |
| 6924995 | CAM circuit with radiation resistance | — | 2005-08-02 |
| 6879504 | Content addressable memory (CAM) devices having error detection and correction control circuits therein and methods of operating same | Kee Park, Chau-Chin Wu, Mark Baumann | 2005-04-12 |
| 6870749 | Content addressable memory (CAM) devices with dual-function check bit cells that support column redundancy and check bit cells with reduced susceptibility to soft errors | Kee Park | 2005-03-22 |