Issued Patents All Time
Showing 26–50 of 54 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7016452 | Delay locked loop | Thomas Hein, Thilo Marx, Patrick Heyne | 2006-03-21 |
| 6985400 | On-die detection of the system operation frequency in a DRAM to adjust DRAM operations | Jennifer Huckaby, Johnathan Edmonds, Tao Tian | 2006-01-10 |
| 6956786 | Random access memory with optional inaccessible memory cells | Thoai-Thai Le | 2005-10-18 |
| 6952378 | Method for on-die detection of the system operation frequency in a DRAM to adjust DRAM operations | Jennifer Huckaby, Johnathan Edmonds, Tao Tian | 2005-10-04 |
| 6928025 | Synchronous integrated memory | Thomas Hein, Thilo Marx, Patrick Heyne | 2005-08-09 |
| 6873509 | Use of an on-die temperature sensing scheme for thermal protection of DRAMS | Jennifer Huckaby, Johnathan Edmonds | 2005-03-29 |
| 6847911 | Method and apparatus for temperature throttling the access frequency of an integrated circuit | Jennifer Huckaby, Johnathan Edmonds | 2005-01-25 |
| 6809914 | Use of DQ pins on a ram memory chip for a temperature sensing protocol | Johnathan Edmonds, Jennifer Huckaby, Matt Welch | 2004-10-26 |
| 6784650 | Circuit configuration for generating a controllable output voltage | Thomas Hein, Patrick Heyne, Thilo Marx | 2004-08-31 |
| 6777990 | Delay lock loop having an edge detector and fixed delay | George Alexander | 2004-08-17 |
| 6760261 | DQS postamble noise suppression by forcing a minimum pulse length | George Alexander | 2004-07-06 |
| 6711091 | Indication of the system operation frequency to a DRAM during power-up | Jennifer Huckaby, Johnathan Edmonds | 2004-03-23 |
| 6696872 | Delay locked loop compensating for effective loads of off-chip drivers and methods for locking a delay loop | Thoai-Thai Le | 2004-02-24 |
| 6670802 | Integrated circuit having a test operating mode and method for testing a multiplicity of such circuits | Stefan Dietrich, Patrick Heyne, Thilo Marx, Sabine Kieser, Michael Sommer +4 more | 2003-12-30 |
| 6661265 | Delay locked loop for generating complementary clock signals | Thilo Marx, Patrick Heyne, Thomas Hein | 2003-12-09 |
| 6657422 | Current mirror circuit | Patrick Heyne, Thilo Marx, Thomas Hein | 2003-12-02 |
| 6653875 | Method and apparatus for a delay lock loop | George Alexander | 2003-11-25 |
| 6584021 | Semiconductor memory having a delay locked loop | Patrick Heyne, Thomas Hein, Marx Thilo | 2003-06-24 |
| 6542389 | Voltage pump with switch-on control | Stefan Dietrich, Patrick Heyne, Thilo Marx, Sabine Kieser, Michael Sommer +4 more | 2003-04-01 |
| 6532188 | Integrated memory having a row access controller for activating and deactivating row lines | Stefan Dietrich, Thomas Hein, Patrick Heyne, Thilo Marx, Sabine Kieser +3 more | 2003-03-11 |
| 6480024 | Circuit configuration for programming a delay in a signal path | Stefan Dietrich, Thomas Hein, Patrick Heyne, Michael Markert, Thilo Marx +4 more | 2002-11-12 |
| 6388944 | Memory component with short access time | Peter Schrogmeier, Stefan Dietrich, Thomas Hein, Patrick Heyne, Thilo Marx | 2002-05-14 |
| 6366527 | Circuit configuration for generating an output clock signal with optimized signal generation time | Thomas Hein, Thilo Marx, Patrick Heyne | 2002-04-02 |
| 6351167 | Integrated circuit with a phase locked loop | Thomas Hein, Thilo Marx, Patrick Heyne | 2002-02-26 |
| 6285176 | Voltage generator with superimposed reference voltage and deactivation signals | Thilo Marx, Thomas Hein, Patrick Heyne | 2001-09-04 |