Issued Patents All Time
Showing 26–34 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6316802 | Easy to manufacture integrated semiconductor memory configuration with platinum electrodes | Walter Hartner, Frank Hintermaier, Carlos Mazure-Espejo, Rainer Bruchhaus, Wolfgang Hönlein +1 more | 2001-11-13 |
| 6197633 | Method for the production of an integrated semiconductor memory configuration | Walter Hartner, Carlos Mazure-Espejo | 2001-03-06 |
| 6171934 | Recovery of electronic properties in process-damaged ferroelectrics by voltage-cycling | Vikram Joshi, Narayan Solayappan, Walter Hartner | 2001-01-09 |
| 6168988 | Method for producing barrier-free semiconductor memory configurations | Walter Hartner, Frank Hintermaier, Carlos Mazure-Espejo | 2001-01-02 |
| 6136659 | Production process for a capacitor electrode formed of a platinum metal | Walter Hartner, Volker Weinrich, Carlos Mazure-Espejo | 2000-10-24 |
| 6097050 | Memory configuration with self-aligning non-integrated capacitor configuration | Walter Hartner, Carlos Mazure-Espejo | 2000-08-01 |
| 6051485 | Method of producing a platinum-metal pattern or structure by a lift-off process | Walter Hartner, Dana Pitzer | 2000-04-18 |
| 6043529 | Semiconductor configuration with a protected barrier for a stacked cell | Walter Hartner, Carlos Mazure-Espejo | 2000-03-28 |
| 5962069 | Process for fabricating layered superlattice materials and AB0.sub.3 type metal oxides without exposure to oxygen at high temperatures | Walter Hartner, Carlos Mazure, Narayan Solayappan, Vikram Joshi, Gary F. Derbenwick | 1999-10-05 |