WS

William E. Speight

IBM: 54 patents #1,518 of 70,183Top 3%
🗺 Texas: #1,469 of 125,132 inventorsTop 2%
Overall (All Time): #47,695 of 4,157,543Top 2%
54
Patents All Time

Issued Patents All Time

Showing 26–50 of 54 patents

Patent #TitleCo-InventorsDate
8250307 Sourcing differing amounts of prefetch data in response to data prefetch requests Ravi Kumar Arimilli, Gheorghe C. Cascaval, Balaram Sinharoy, Lixin Zhang 2012-08-21
8250298 Mechanisms for reducing DRAM power consumption Elmootazbellah Nabil Elnozahy, Karthick Rajamani, Lixin Zhang 2012-08-21
8234652 Performing setup operations for receiving different amounts of data while processors are performing message passing interface tasks Lakshminarayana B. Arimilli, Ravi Kumar Arimilli, Ramakrishnan Rajamony 2012-07-31
8209488 Techniques for prediction-based indirect data prefetching Ravi Kumar Arimilli, Balaram Sinharoy, Lixin Zhang 2012-06-26
8185896 Method for data processing using a multi-tiered full-graph interconnect architecture Lakshminarayana B. Arimilli, Ravi Kumar Arimilli, Ramakrishnan Rajamony, Edward J. Seminaro 2012-05-22
8179674 Scalable space-optimized and energy-efficient computing system John B. Carter, Wael R. El-Essawy, Elmootazbellah Nabil Elnozahy, Madhusudan K. Iyengar, Thomas Walter Keller +4 more 2012-05-15
8166277 Data prefetching using indirect addressing Ravi Kumar Arimilli, Balaram Sinharoy, Lixin Zhang 2012-04-24
8161265 Techniques for multi-level indirect data prefetching Ravi Kumar Arimilli, Balaram Sinharoy, Lixin Zhang 2012-04-17
8161263 Techniques for indirect data prefetching Ravi Kumar Arimilli, Balaram Sinharoy, Lixin Zhang 2012-04-17
8161264 Techniques for data prefetching using indirect addressing with offset Ravi Kumar Arimilli, Balaram Sinharoy, Lixin Zhang 2012-04-17
8140768 Jump starting prefetch streams across page boundaries Lixin Zhang 2012-03-20
8140731 System for data processing using a multi-tiered full-graph interconnect architecture Lakshminarayana B. Arimilli, Ravi Kumar Arimilli, Ramakrishnan Rajamony, Edward J. Seminaro 2012-03-20
8127300 Hardware based dynamic load balancing of message passing interface tasks Lakshminarayana B. Arimilli, Ravi Kumar Arimilli, Ramakrishnan Rajamony 2012-02-28
8108876 Modifying an operation of one or more processors executing message passing interface tasks Lakshminarayana B. Arimilli, Ravi Kumar Arimilli, Ramakrishnan Rajamony 2012-01-31
7996564 Remote asynchronous data mover Lakshminarayana B. Arimilli, Ravi Kumar Arimilli, Ronald Nick Kalla, Ramakrishnan Rajamony, Balaram Sinharoy +1 more 2011-08-09
7958182 Providing full hardware support of collective operations in a multi-tiered full-graph interconnect architecture Lakshminarayana B. Arimilli, Ravi Kumar Arimilli, Ramakrishnan Rajamony 2011-06-07
7958183 Performing collective operations using software setup and partial software execution at leaf nodes in a multi-tiered full-graph interconnect architecture Lakshminarayana B. Arimilli, Ravi Kumar Arimilli, Ramakrishnan Rajamony 2011-06-07
7958316 Dynamic adjustment of prefetch stream priority Lixin Zhang 2011-06-07
7958317 Cache directed sequential prefetch Lixin Zhang 2011-06-07
7904590 Routing information through a data processing system implementing a multi-tiered full-graph interconnect architecture Lakshminarayana B. Arimilli, Ravi Kumar Arimilli, Ramakrishnan Rajamony 2011-03-08
7783870 Branch target address cache David S. Levitan, Lixin Zhang 2010-08-24
7761673 Complier assisted victim cache bypassing Yaoqing Gao, Lixin Zhang 2010-07-20
7698508 System and method for reducing unnecessary cache operations Ramakrishnan Rajamony, Hazim Shafi, Lixin Zhang 2010-04-13
7657729 Efficient multiple-table reference prediction mechanism Wael R. El-Essawy, Ramakrishnan Rajamony, Hazim Shafi, Lixin Zhang 2010-02-02
7546417 Method and system for reducing cache tag bits Ramakrishnan Rajamony, Lixin Zhang 2009-06-09