Issued Patents All Time
Showing 26–34 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5978957 | Very fast pipelined shifter element with parity prediction | Klaus J. Getzlaff, Erwin Pfeffer, Ute Gaertner, Gunter Gerwig | 1999-11-02 |
| 5964845 | Processing system having improved bi-directional serial clock communication circuitry | Robert E. Braun, Klaus J. Getzlaff, Thomas Pfluger, Dietmar Schmunkamp | 1999-10-12 |
| 5944772 | Combined adder and logic unit | Juergen Haas, Ulrich Krauch, Thomas Ludwig, Holger Wetter | 1999-08-31 |
| 5928319 | Combined binary/decimal adder unit | Ulrich Krauch, Thomas Ludwig, Holger Wetter | 1999-07-27 |
| 5875123 | Carry-select adder with pre-counting of leading zero digits | Son Dao Trong, Gunter Gerwig, Klaus J. Getzlaff | 1999-02-23 |
| 5761521 | Processor for character strings of variable length | Herbert Chilinski, Klaus J. Getzlaff, Ralph C. Koester | 1998-06-02 |
| 5754875 | Computer system with double width data bus | Klaus J. Getzlaff, Johann Hajdu, Birgit Withelm | 1998-05-19 |
| 5634047 | Method for executing branch instructions by processing loop end conditions in a second processor | Klaus J. Getzlaff, Udo Wille, Brigitte Roethe, Hans-Werner Tast | 1997-05-27 |
| 5138707 | Method of operating a timer in a digital data processing system | Johann Hajdu, Klaus J. Getzlaff | 1992-08-11 |