Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8943456 | Layout determining for wide wire on-chip interconnect lines | Rachel Gordin, David Goren, Kurt A. Tallman, Youri V. Tretiakov | 2015-01-27 |
| 7134099 | ESD design, verification and checking system and method of use | David S. Collins, Donald L. Jordan, Steven H. Voldman | 2006-11-07 |
| 6865725 | Method and system for integrated circuit design | Carl Dickey, Donald L. Jordan, Raminderpal Singh | 2005-03-08 |
| 5790835 | Practical distributed transmission line analysis | Ronald Keith Case, Donald L. Jordan | 1998-08-04 |