Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7681095 | Methods and apparatus for testing integrated circuits | Derick G. Behrends, Peter Thomas Freiburger | 2010-03-16 |
| 7443744 | Method for reducing wiring and required number of redundant elements | Derick G. Behrends, Peter Thomas Freiburger, Daniel Mark Nelson | 2008-10-28 |
| 7418637 | Methods and apparatus for testing integrated circuits | Derick G. Behrends, Peter Thomas Freiburger | 2008-08-26 |
| 7283411 | Flood mode implementation for continuous bitline local evaluation circuit | Chad A. Adams, Derick G. Behrends | 2007-10-16 |
| 7224594 | Glitch protect valid cell and method for maintaining a desired state value | Derick G. Behrends, Chad A. Adams, Anthony Gus Aipperspach, Robert N. Krentler | 2007-05-29 |
| 7215154 | Maskable dynamic logic | Derick G. Behrends, Chihhung Liao | 2007-05-08 |
| 7133320 | Flood mode implementation for continuous bitline local evaluation circuit | Chad A. Adams, Derick G. Behrends | 2006-11-07 |
| 7035127 | Method and sum addressed cell encoder for enhanced compare and search timing for CAM compare | Chad A. Adams, Derick G. Behrends, Todd A. Christensen, Peter Thomas Freiburger | 2006-04-25 |