Issued Patents All Time
Showing 26–43 of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5672892 | Process for making and programming a flash memory array | Seiki Ogura, Robert C. Wong | 1997-09-30 |
| 5654917 | Process for making and programming a flash memory array | Seiki Ogura, Robert C. Wong | 1997-08-05 |
| 5650345 | Method of making self-aligned stacked gate EEPROM with improved coupling ratio | Seiki Ogura | 1997-07-22 |
| 5643813 | Packing density for flash memories by using a pad oxide | Joyce Elizabeth Acocella, Carol Galli, Louis L. Hsu, Seiki Ogura, Joseph F. Shepard, Jr. | 1997-07-01 |
| 5622881 | Packing density for flash memories | Joyce Elizabeth Acocella, Carol Galli, Louis L. Hsu, Seiki Ogura, Joseph F. Shepard, Jr. | 1997-04-22 |
| 5541130 | Process for making and programming a flash memory array | Seiki Ogura, Robert C. Wong | 1996-07-30 |
| 5369049 | DRAM cell having raised source, drain and isolation | Joyce Elizabeth Acocella, Louis L. Hsu, Seiki Ogura, Joseph F. Shepard, Jr. | 1994-11-29 |
| 5334281 | Method of forming thin silicon mesas having uniform thickness | George Doerre, Seiki Ogura | 1994-08-02 |
| 5264395 | Thin SOI layer for fully depleted field effect transistors | Ahmet Bindal, Carol Galli | 1993-11-23 |
| H986 | Field effect-transistor with asymmetrical structure | Christopher F. Codella, Seiki Ogura | 1991-11-05 |
| 4982257 | Vertical bipolar transistor with collector and base extensions | Shah Akbar, Patricia L. Kroesen, Seiki Ogura | 1991-01-01 |
| 4957875 | Vertical bipolar transistor | Shah Akbar, Patricia L. Kroesen, Seiki Ogura | 1990-09-18 |
| 4868135 | Method for manufacturing a Bi-CMOS device | Seiki Ogura | 1989-09-19 |
| 4729006 | Sidewall spacers for CMOS circuit stress relief/isolation and method for making | Anthony J. Dally, Seiki Ogura, Jacob Riseman | 1988-03-01 |
| 4671851 | Method for removing protuberances at the surface of a semiconductor wafer using a chem-mech polishing technique | Klaus D. Beyer, James S. Makris, Eric Mendel, Karen A. Nummy, Seiki Ogura +1 more | 1987-06-09 |
| 4648937 | Method of preventing asymmetric etching of lines in sub-micrometer range sidewall images transfer | Seiki Ogura, Jacob Riseman, Ronald N. Schulz | 1987-03-10 |
| 4641170 | Self-aligned lateral bipolar transistors | Seiki Ogura, Jacob Riseman, Joseph F. Shepard, Jr. | 1987-02-03 |
| 4551906 | Method for making self-aligned lateral bipolar transistors | Seiki Ogura, Jacob Riseman, Joseph F. Shepard, Jr. | 1985-11-12 |