| 6788227 |
Apparatus for integrated cascade encoding |
Barbara A. Hall, Agnes Y. Ngai |
2004-09-07 |
| 6611159 |
Apparatus and method for synchronizing multiple circuits clocked at a divided phase locked loop frequency |
Louis Christopher Milano, Eric E. Retter, Roger S. Rutter |
2003-08-26 |
| 6507370 |
Highly adjustable video composite sync separator and variable gain pixel clock frequency locking apparatus and method |
Dennis E. Franklin, Stanley J. Kolodziejski, Anthony L. Simenkiewicz |
2003-01-14 |
| 6356589 |
Sharing reference data between multiple encoders parallel encoding a sequence of video frames |
Charlene Ann Gebler, Barbara A. Hall, Agnes Y. Ngai |
2002-03-12 |
| 6301671 |
Apparatus and method for power reduction control in a video encoder device |
Charles Boice, John M. Kaczmarczyk, John A. Murdock, Robert L. Woodard |
2001-10-09 |
| 6229853 |
Method and apparatus to accommodate partial picture input to an MPEG-compliant encoder |
Charlene Ann Gebler, Agnes Y. Ngai, Robert L. Woodard |
2001-05-08 |
| 6188730 |
Highly programmable chrominance filter for 4:2:2 to 4:2:0 conversion during MPEG2 video encoding |
Agnes Y. Ngai |
2001-02-13 |
| 6127851 |
Circuit and method for differentiating multiple modules |
Charles Boice, John M. Kaczmarczyk |
2000-10-03 |
| 6040875 |
Method to compensate for a fade in a digital video input sequence |
Charles Boice, John M. Kaczmarczyk, Agnes Y. Ngai |
2000-03-21 |
| 5790199 |
Method and apparatus to accommodate partial picture input to an MPEG-compliant encoder |
Charlene Ann Gebler, Agnes Y. Ngai, Robert L. Woodard |
1998-08-04 |
| 5694346 |
Integrated circuit including fully testable small scale read only memory constructed of level sensitive scan device shift register latches |
Louis Christopher Milano |
1997-12-02 |
| 5060136 |
Four-way associative cache with DLAT and separately addressable arrays used for updating certain bits without reading them out first |
Richard W. Furney, Gordon C. Hurlbut |
1991-10-22 |
