MB

Matthew W. Baker

IBM: 8 patents #13,150 of 70,183Top 20%
MG Mentor Graphics: 3 patents #124 of 698Top 20%
Overall (All Time): #460,070 of 4,157,543Top 15%
11
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9558308 Compiler for closed-loop 1×N VLSI design Benjamin J. Bowers, Anthony Correale, Jr., Irfan Rashid, Paul M. Steinmetz 2017-01-31
8887113 Compiler for closed-loop 1xN VLSI design Benjamin J. Bowers, Anthony Correale, Jr., Irfan Rashid, Paul M. Steinmetz 2014-11-11
8739086 Compiler for closed-loop 1×N VLSI design Benjamin J. Bowers, Anthony Correale, Jr., Irfan Rashid, Paul M. Steinmetz 2014-05-27
8156458 Uniquification and parent-child constructs for 1xN VLSI design Benjamin J. Bowers, Anthony Correale, Jr., Irfan Rashid, Paul M. Steinmetz 2012-04-10
8141016 Integrated design for manufacturing for 1×N VLSI design Anthony Correale, Jr., Benjamin J. Bowers, Irfan Rashid, Paul M. Steinmetz 2012-03-20
8136062 Hierarchy reassembler for 1×N VLSI design Paul M. Steinmetz, Benjamin J. Bowers, Anthony Correale, Jr., Irfan Rashid 2012-03-13
8132134 Closed-loop 1×N VLSI design system Anthony Correale, Jr., Benjamin J. Bowers, Irfan Rashid, Paul M. Steinmetz 2012-03-06
8122399 Compiler for closed-loop 1×N VLSI design Benjamin J. Bowers, Anthony Correale, Jr., Irfan Rashid, Paul M. Steinmetz 2012-02-21
7966598 Top level hierarchy wiring via 1×N compiler Anthony L. Polomik, Benjamin J. Bowers, Anthony Correale, Jr., Irfan Rashid, Paul M. Steinmetz 2011-06-21
7882385 Reducing inefficiencies of multi-clock-domain interfaces using a modified latch bank Nicole M. Arnold, Benjamin J. Bowers, Anthony Correale, Jr., Paul M. Steinmetz 2011-02-01
7672188 System for blocking multiple memory read port activation Anthony Correale, Jr., Benjamin J. Bowers, Michael B. Mitchell, Nishith Rohatgi 2010-03-02