KB

Kevin A. Batson

IBM: 19 patents #5,782 of 70,183Top 9%
GA Gn Audio A/S: 11 patents #7 of 112Top 7%
CS Citrix Systems: 5 patents #291 of 1,302Top 25%
GA Governors America: 2 patents #1 of 12Top 9%
GU Globalfoundries U.S.: 1 patents #344 of 665Top 55%
VX Vxi: 1 patents #6 of 16Top 40%
Globalfoundries: 1 patents #2,221 of 4,424Top 55%
📍 Pederstrup, VT: #1 of 1 inventorsTop 100%
Overall (All Time): #78,332 of 4,157,543Top 2%
40
Patents All Time

Issued Patents All Time

Showing 26–40 of 40 patents

Patent #TitleCo-InventorsDate
7304352 Alignment insensitive D-cache cell K. Paul Muller, Michael Ju Hyeok Lee 2007-12-04
7117400 Memory device with data line steering and bitline redundancy Robert E. Busch, Garrett Stephen Koch, Fred J. Towler, Reid A. Wistort 2006-10-03
6791855 Redundant array architecture for word replacement in CAM Robert E. Busch, Gary S. Koch, Fred J. Towler, Reid A. Wistort 2004-09-14
6760881 Method for combining refresh operation with parity validation in a DRAM-based content addressable memory (CAM) Robert E. Busch, Albert M. Chu, Ezra D. B. Hall 2004-07-06
6728123 Redundant array architecture for word replacement in CAM Robert E. Busch, Gary S. Koch, Fred J. Towler, Reid A. Wistort 2004-04-27
6687144 High reliability content-addressable memory using shadow content-addressable memory Geordie M. Braceras, Robert E. Busch, Gary S. Koch 2004-02-03
6650561 High reliability content-addressable memory using shadow content-addressable memory Geordie M. Braceras, Robert E. Busch, Gary S. Koch 2003-11-18
6442055 System and method for conserving power in a content addressable memory by providing an independent search line voltage Robert E. Busch 2002-08-27
6430073 Dram CAM cell with hidden refresh Robert E. Busch, Garrett Stephen Koch 2002-08-06
6282144 Multi-ported memory with asynchronous and synchronous protocol Garrett Stephen Koch, Sebastian T. Ventrone 2001-08-28
6011726 Four device SRAM cell with single bitline Robert A. Ross 2000-01-04
5805496 Four device SRAM cell with single bitline Robert A. Ross 1998-09-08
5802070 Testing associative memory Robert Dean Adams, George M. Braceras, Fred J. Towler 1998-09-01
5778428 Programmable high performance mode for multi-way associative cache/memory designs Robert A. Ross 1998-07-07
5646566 Low power clocked set/reset fast dynamic latch Robert A. Ross 1997-07-08