Issued Patents All Time
Showing 126–150 of 153 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5956503 | Method and system for front-end and back-end gathering of store instructions within a data-processing system | Ravi Kumar Arimilli, John Steven Dodson | 1999-09-21 |
| 5946709 | Shared intervention protocol for SMP bus using caches, snooping, tags and prioritizing | Ravi Kumar Arimilli, John Steven Dodson, John Michael Kaiser | 1999-08-31 |
| 5943686 | Multiple cache directories for non-arbitration concurrent accessing of a cache memory | Ravi Kumar Arimilli, John Steven Dodson, Timothy M. Skergan | 1999-08-24 |
| 5943685 | Method of shared intervention via a single data provider among shared caches for SMP bus | Ravi Kumar Arimilli, John Steven Dodson, John Michael Kaiser | 1999-08-24 |
| 5940864 | Shared memory-access priorization method for multiprocessors using caches and snoop responses | Ravi Kumar Arimilli, John Steven Dodson, John Michael Kaiser | 1999-08-17 |
| 5940611 | Method and system for front-end gathering of store instructions within a data-processing system | Ravi Kumar Arimilli, John Steven Dodson | 1999-08-17 |
| 5940856 | Cache intervention from only one of many cache lines sharing an unmodified value | Ravi Kumar Arimilli, John Steven Dodson, John Michael Kaiser | 1999-08-17 |
| 5937172 | Apparatus and method of layering cache and architectural specific functions to permit generic interface definition | Ravi Kumar Arimilli, John Steven Dodson, Derek E. Williams | 1999-08-10 |
| 5937167 | Communication controller for generating four timing signals each of selectable frequency for transferring data across a network | Ravi Kumar Arimilli | 1999-08-10 |
| 5935234 | Method and system for controlling access to a shared resource in a data processing system utilizing pseudo-random priorities | Ravi Kumar Arimilli, John Steven Dodson, Derek E. Williams | 1999-08-10 |
| 5931924 | Method and system for controlling access to a shared resource that each requestor is concurrently assigned at least two pseudo-random priority weights | Ravi Kumar Arimilli, John Steven Dodson, Derek E. Williams | 1999-08-03 |
| 5924121 | Adaptive writeback of cache line data in a computer operated with burst mode transfer cycles | Ravi Kumar Arimilli, John Steven Dodson | 1999-07-13 |
| 5924118 | Method and system for speculatively sourcing cache memory data prior to upstream cache invalidation within a multiprocessor data-processing system | Ravi Kumar Arimilli, John Steven Dodson | 1999-07-13 |
| 5913231 | Method and system for high speed memory address forwarding mechanism | John Steven Dodson, Ravi Kumar Arimilli | 1999-06-15 |
| 5909698 | Cache block store instruction operations where cache coherency is achieved without writing all the way back to main memory | Ravi Kumar Arimilli, John Steven Dodson | 1999-06-01 |
| 5909561 | Apparatus and method for separately layering cache and architectural specific functions in different operational controllers to facilitate design extension | Ravi Kumar Arimilli, John Steven Dodson, Derek E. Williams | 1999-06-01 |
| 5895495 | Demand-based larx-reserve protocol for SMP system buses | Ravi Kumar Arimilli, John Steven Dodson, Derek E. Williams | 1999-04-20 |
| 5896539 | Method and system for controlling access to a shared resource in a data processing system utilizing dynamically-determined weighted pseudo-random priorities | Ravi Kumar Arimilli, John Steven Dodson, Derek E. Williams | 1999-04-20 |
| 5895484 | Method and system for speculatively accessing cache memory data within a multiprocessor data-processing system using a cache controller | Ravi Kumar Arimilli, John Steven Dodson | 1999-04-20 |
| 5894569 | Method and system for back-end gathering of store instructions within a data-processing system | Ravi Kumar Arimilli, John Steven Dodson | 1999-04-13 |
| 5893163 | Method and system for allocating data among cache memories within a symmetric multiprocessor data-processing system | Ravi Kumar Arimilli, John Steven Dodson | 1999-04-06 |
| 5883904 | Method for recoverability via redundant cache arrays | Ravi Kumar Arimilli, John Steven Dodson, Timothy M. Skergan | 1999-03-16 |
| 5867511 | Method for high-speed recoverable directory access | Ravi Kumar Arimilli, John Steven Dodson, Timothy M. Skergan | 1999-02-02 |
| 5860101 | Scalable symmetric multiprocessor data-processing system with data allocation among private caches and segments of system memory | Ravi Kumar Arimilli, John Steven Dodson | 1999-01-12 |
| 5796979 | Data processing system having demand based write through cache with enforced ordering | Ravi Kumar Arimilli, John Steven Dodson, Guy L. Guthrie | 1998-08-18 |