Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8438509 | Automated generation of oxide pillar slot shapes in silicon-on-insulator formation technology | William K. Hensen, Michael D. Hulvey, Amit Kumar, Amanda L. Tessier | 2013-05-07 |
| 8299775 | Current-aligned auto-generated non-equiaxial hole shape for wiring | Howard S. Landis, David P. Parker | 2012-10-30 |
| 8176447 | Formation of masks/reticles having dummy features | Amit Kumar, Howard S. Landis | 2012-05-08 |
| 8006211 | IC chip and design structure including stitched circuitry region boundary identification | Robert K. Leidy, Kevin N. Ogg, Richard J. Rassel | 2011-08-23 |
| 7958482 | Stitched circuitry region boundary identification for stitched IC chip layout | Robert K. Leidy, Kevin N. Ogg, Richard J. Rassel | 2011-06-07 |
| 7930667 | System and method of automated wire and via layout optimization description | Bette L. Bergman Reuter, Howard S. Landis, Anthony K. Stamper | 2011-04-19 |
| 7858269 | Structure and method for sub-resolution dummy clear shapes for improved gate dimensional control | Howard S. Landis, David P. Parker | 2010-12-28 |
| 7861208 | Structure for partitioned dummy fill shapes for reduced mask bias with alternating phase shift masks | Thomas B. Faure, Howard S. Landis | 2010-12-28 |
| 7739648 | Formation of masks/reticles having dummy features | Amit Kumar, Howard S. Landis | 2010-06-15 |
| 7739632 | System and method of automated wire and via layout optimization description | Bette L. Bergman Reuter, Howard S. Landis, Anthony K. Stamper | 2010-06-15 |
| 7709300 | Structure and method for partitioned dummy fill shapes for reduced mask bias with alternating phase shift masks | Thomas B. Faure, Howard S. Landis | 2010-05-04 |
| 7250363 | Aligned dummy metal fill and hole shapes | Howard S. Landis | 2007-07-31 |