Issued Patents All Time
Showing 76–100 of 175 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7577151 | Method and apparatus for providing a network connection table | Claude Basso, Jean Calvignac, Chih-jen Chang, Philippe Damon, Natarajan Vaidhyanathan +1 more | 2009-08-18 |
| 7529224 | Scheduler, network processor, and methods for weighted best effort scheduling | Claude Basso, Jean Calvignac, Chih-jen Chang, Natarajan Vaidhyanathan | 2009-05-05 |
| 7522621 | Apparatus and method for efficiently modifying network data frames | Claude Basso, Jean Calvignac, Chih-jen Chang | 2009-04-21 |
| 7508771 | Method for reducing latency in a host ethernet adapter (HEA) | Claude Basso, Jean Calvignac, Chih-jen Chang, Philippe Damon, Natarajan Vaidhyanathan +1 more | 2009-03-24 |
| 7506081 | System and method of maintaining high bandwidth requirement of a data pipe from low bandwidth memories | Peter Barri, Jean Calvignac, Kent Harold Haselhorst, Marco C. Heddes, Joseph Franklin Logan +1 more | 2009-03-17 |
| 7499470 | Sequence-preserving deep-packet processing in a multiprocessor system | Jean Calvignac, Mohammad Pevravian | 2009-03-03 |
| 7492771 | Method for performing a packet header lookup | Claude Basso, Jean Calvignac, Chih-jen Chang, Philippe Damon, Ronald Edward Fuhs +3 more | 2009-02-17 |
| 7483429 | Method and system for flexible network processor scheduler and data flow | Jean Calvignac, Chih-jen Chang, Joseph Franklin Logan, Daniel Wind | 2009-01-27 |
| 7474662 | Systems and methods for rate-limited weighted best effort scheduling | Claude Basso, Jean Calvignac, Chih-jen Chang, Natarajan Vaidhyanathan | 2009-01-06 |
| 7469332 | Systems and methods for adaptively mapping an instruction cache | Claude Basso, Jean Calvignac, Chih-jen Chang, Harm Peter Hofstee, Jens Leenstra +2 more | 2008-12-23 |
| 7466715 | Flexible control block format for frame description and management | Claude Basso, Jean Calvignac, Chih-jen Chang, Philippe Damon, Joseph Franklin Logan | 2008-12-16 |
| 7457241 | Structure for scheduler pipeline design for hierarchical link sharing | Claude Basso, Jean Calvignac, Chih-jen Chang, Gordon Taylor Davis | 2008-11-25 |
| 7412546 | System method structure in network processor that indicates last data buffer of frame packet by last flag bit that is either in first or second position | Claude Basso, Jean Calvignac, Marco C. Heddes, Joseph Franklin Logan | 2008-08-12 |
| 7409520 | Systems and methods for time division multiplex multithreading | Claude Basso, Jean Calvignac, Chih-jen Chang, Gordon Taylor Davis, Harm Peter Hofstee +1 more | 2008-08-05 |
| 7406080 | Method and structure for enqueuing data packets for processing | Claude Basso, Jean Calvignac, Chih-jen Chang, Gordon Taylor Davis | 2008-07-29 |
| 7395517 | Data aligner in reconfigurable computing environment | Jean-Paul Aldebert, Claude Basso, Jean Calvignac | 2008-07-01 |
| 7383244 | Longest prefix match (LPM) algorithm implementation for a network processor | Brian Mitchell Bass, Jean Calvignac, Marco C. Heddes, Antonios Maragkos, Piyush C. Patel +1 more | 2008-06-03 |
| 7376809 | Systems and methods for multi-frame control blocks | Claude Basso, Jean Calvignac, Chih-jen Chang | 2008-05-20 |
| 7336667 | Apparatus, method and program product to generate and use CRC in communications network | James J. Allen, Jr., Jean Calvignac, Natarajan Vaidhyanathan | 2008-02-26 |
| 7333493 | Method for prevention of out-of-order delivery of data packets | Claude Basso, Jean Calvignac, Natarajan Vaidhyanathan | 2008-02-19 |
| 7327759 | Sequence-preserving deep-packet processing in a multiprocessor system | Jean Calvignac, Mohammad Peyravian | 2008-02-05 |
| 7315901 | Method and system for network processor scheduling outputs using disconnect/reconnect flow queues | Brian Mitchell Bass, Jean Calvignac, Marco C. Heddes, Michael S. Siegel | 2008-01-01 |
| 7293158 | Systems and methods for implementing counters in a network processor with cost effective memory | Jean Calvignac, Chih-jen Chang, Joseph Franklin Logan | 2007-11-06 |
| 7277982 | DRAM access command queuing structure | Jean Calvignac, Chih-jen Chang, Gordon Taylor Davis | 2007-10-02 |
| 7257616 | Network switch and components and method of operation | Brian Mitchell Bass, Jean Calvignac, Anthony Matteo Gallo, Marco C. Heddes, Sridhar Rao +2 more | 2007-08-14 |