Issued Patents All Time
Showing 176–200 of 501 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8455330 | Devices with gate-to-gate isolation structures and methods of manufacture | Brent A. Anderson, Jed H. Rankin | 2013-06-04 |
| 8445965 | Strained semiconductor devices and methods of fabricating strained semiconductor devices | Brent A. Anderson, Jed H. Rankin | 2013-05-21 |
| 8445949 | Field effect transistors (FETS) and methods of manufacture | Brent A. Anderson | 2013-05-21 |
| 8420471 | Dense pitch bulk FinFET process by selective EPI and etch | Brent A. Anderson | 2013-04-16 |
| 8420460 | Method, structure and design structure for customizing history effects of SOI circuits | Brent A. Anderson, Andres Bryant | 2013-04-16 |
| 8415216 | Multi-gate non-planar field effect transistor structure and method of forming the structure using a dopant implant process to tune device drive current | Brent A. Anderson | 2013-04-09 |
| 8410554 | Method, structure and design structure for customizing history effects of SOI circuits | Brent A. Anderson | 2013-04-02 |
| 8404560 | Devices with gate-to-gate isolation structures and methods of manufacture | Brent A. Anderson, Jed H. Rankin | 2013-03-26 |
| 8383443 | Non-uniform gate dielectric charge for pixel sensor cells and methods of manufacturing | Brent A. Anderson, Andres Bryant, William F. Clark, Jr., John J. Ellis-Monaghan | 2013-02-26 |
| 8378419 | Isolation FET for integrated circuit | Brent A. Anderson | 2013-02-19 |
| 8378394 | Method for forming and structure of a recessed source/drain strap for a MUGFET | Brent A. Anderson, Andres Bryant, Jed H. Rankin | 2013-02-19 |
| 8377780 | Transistors having stressed channel regions and methods of forming transistors having stressed channel regions | Brent A. Anderson | 2013-02-19 |
| 8354351 | Serial irradiation of a substrate by multiple radiation sources | Brent A. Anderson | 2013-01-15 |
| 8354319 | Integrated planar and multiple gate FETs | Brent A. Anderson | 2013-01-15 |
| 8350343 | Field effect transistor with channel region edge and center portions having different band structures for suppressed corner leakage | Brent A. Anderson | 2013-01-08 |
| 8343836 | Recessed gate channel with low Vt corner | Brent A. Anderson, Andres Bryant | 2013-01-01 |
| 8299505 | Pixel sensor cell with a dual work function gate electode | Brent A. Anderson, Andres Bryant, William F. Clark, Jr., John J. Ellis-Monaghan | 2012-10-30 |
| 8298913 | Devices with gate-to-gate isolation structures and methods of manufacture | Brent A. Anderson, Jed H. Rankin | 2012-10-30 |
| 8299534 | FET with replacement gate structure and method of fabricating the same | Brent A. Anderson | 2012-10-30 |
| 8299538 | Differential nitride pullback to create differential NFET to PFET divots for improved performance versus leakage | Brent A. Anderson, Suk Hoon Ku | 2012-10-30 |
| 8294222 | Band edge engineered Vt offset device | Brent A. Anderson | 2012-10-23 |
| 8288806 | Asymmetric field effect transistor structure and method | Brent A. Anderson, Andres Bryant, William F. Clark, Jr. | 2012-10-16 |
| 8242561 | Semiconductor devices with improved self-aligned contact areas | Brent A. Anderson, Andres Bryant, Jed H. Rankin | 2012-08-14 |
| 8237471 | Circuit with stacked structure and use thereof | Brent A. Anderson, Andres Bryant | 2012-08-07 |
| 8237233 | Field effect transistor having a gate structure with a first section above a center portion of the channel region and having a first effective work function and second sections above edges of the channel region and having a second effective work function | Brent A. Anderson | 2012-08-07 |