Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12204459 | Data cache region prefetcher | William E. Jones | 2025-01-21 |
| 9390018 | Data cache prefetch hints | Stephen P. Thompson | 2016-07-12 |
| 9348753 | Controlling prefetch aggressiveness based on thrash events | — | 2016-05-24 |
| 9116815 | Data cache prefetch throttle | Stephen P. Thompson | 2015-08-25 |
| 9026739 | Multimode prefetcher | Srilatha Manne, Nitya Ranganathan, Paul Keltcher | 2015-05-05 |
| 8059441 | Memory array on more than one die | Mohammed H. Taufique, Derwin Jallice, John P. DeVale, Edward A. Brekelbaum, Jeffrey P. Rupley, II +2 more | 2011-11-15 |
| 8055827 | Guest interrupt controllers for each processor to aid interrupt virtualization | Benjamin C. Serebrin | 2011-11-08 |
| 8032711 | Prefetching from dynamic random access memory to a static random access memory | Bryan Black, Murali Annavaram, John P. DeVale | 2011-10-04 |
| 7692946 | Memory array on more than one die | Mohammed H. Taufique, Derwin Jallice, John P. DeVale, Edward A. Brekelbaum, Jeffrey P. Rupley, II +2 more | 2010-04-06 |
| 6983356 | High performance memory device-state aware chipset prefetcher | Hemant G. Rotithor, Randy B. Osborne | 2006-01-03 |
| 6122638 | Object-oriented processor and method for caching intermediate data in an object-oriented processor | Gary D. Huber | 2000-09-19 |
| 6070173 | Method and apparatus for assisting garbage collection process within a java virtual machine | Gary D. Huber | 2000-05-30 |
| 5684975 | Method for use in translating virtual addresses into absolute addresses | Karl J. Duvalsaint, Mark S. Farrell, Barry W. Krumm, Charles F. Webb | 1997-11-04 |
| 5652853 | Multi-zone relocation facility computer memory system | Karl J. Duvalsaint, Peter H. Gum, Moon J. Kim, Barry W. Krumm, John F. Scanlon | 1997-07-29 |
| 5649140 | System for use in translating virtual addresses into absolute addresses | Karl J. Duvalsaint, Mark S. Farrell, Barry W. Krumm, Charles F. Webb | 1997-07-15 |
| 5615354 | Method and system for controlling references to system storage by overriding values | Ronald Faye Hill, Jr., Stephen Nadas, James R. Robinson | 1997-03-25 |
| 5386560 | Execution of page data transfer by PT processors and issuing of split start and test instructions by CPUs coordinated by queued tokens | Richard J. Schmalz, Ronald M. Smith, Sr., Susan B. Stillman | 1995-01-31 |
| 5269017 | Type 1, 2 and 3 retry and checkpointing | Clifford O. Hayden, Robert J. Hurban, John S. Murdock, Jr., Susan B. Stillman | 1993-12-07 |
| 5222215 | CPU expansive gradation of I/O interruption subclass recognition | Norman C. Chou, Peter H. Gum, Roger E. Hough, Moon J. Kim, James C. Mazurowski +3 more | 1993-06-22 |
| 4843541 | Logical resource partitioning of a data processing system | George H. Bean, Terry L. Borden, Mark S. Farrell, Peter H. Gum, Roger E. Hough +6 more | 1989-06-27 |