Issued Patents All Time
Showing 51–75 of 107 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7234017 | Computer system architecture for a processor connected to a high speed bus transceiver | Giora Biran, Matthew Adam Cushing, Robert Allen Drehmel, Allen James Gavin, Mark E. Kautzman +8 more | 2007-06-19 |
| 7219185 | Apparatus and method for selecting instructions for execution based on bank prediction of a multi-bank cache | — | 2007-05-15 |
| 7200773 | Reproducing errors via inhibit switches | — | 2007-04-03 |
| 7191432 | High frequency compound instruction mechanism and method for a compare operation in an arithmetic logic unit | — | 2007-03-13 |
| 7188227 | Adaptive memory compression | — | 2007-03-06 |
| 7188130 | Automatic temporary precision reduction for enhanced compression | — | 2007-03-06 |
| 7174469 | Processor power and energy management | — | 2007-02-06 |
| 7124318 | Multiple parallel pipeline processor having self-repairing capability | — | 2006-10-17 |
| 7117389 | Multiple processor core device having shareable functional units for self-repairing capability | — | 2006-10-03 |
| 7099999 | Apparatus and method for pre-fetching data to cached memory using persistent historical page table data | — | 2006-08-29 |
| 7089370 | Apparatus and method for pre-fetching page data using segment table data | — | 2006-08-08 |
| 7085940 | Floating point unit power reduction via inhibiting register file write during tight loop execution | — | 2006-08-01 |
| 7086058 | Method and apparatus to eliminate processor core hot spots | — | 2006-08-01 |
| 7085966 | Methods and arrangements for repairing ports | — | 2006-08-01 |
| 7065694 | Adaptive runtime repairable entry register file | — | 2006-06-20 |
| 7058678 | Fast forwarding ALU | — | 2006-06-06 |
| 7047365 | Cache line purge and update instruction | Steven R. Kunkel | 2006-05-16 |
| 7024618 | Transmission error checking in result forwarding | — | 2006-04-04 |
| 6993668 | Method and system for reducing power consumption in a computing device when the computing device executes instructions in a tight loop | — | 2006-01-31 |
| 6990510 | Wide adder with critical path of three gates | David M. Friend, Nghia V. Phan | 2006-01-24 |
| 6978361 | Effectively infinite branch prediction table mechanism | — | 2005-12-20 |
| 6963964 | Method and apparatus for detecting pipeline address conflict using parallel compares of multiple real addresses | — | 2005-11-08 |
| 6963988 | Fixed point unit power reduction mechanism for superscalar loop execution | — | 2005-11-08 |
| 6941421 | Zero delay data cache effective address generation | — | 2005-09-06 |
| 6934831 | Power reduction mechanism for floating point register file reads | — | 2005-08-23 |