Issued Patents All Time
Showing 26–50 of 53 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6532528 | Data processor and data processor system having multiple modes of address indexing and operation | Junichi Nishimoto, Osamu Nishii, Fumio Arakawa, Masayuki Ito, Makoto Toda +1 more | 2003-03-11 |
| 6425039 | Accessing exception handlers without translating the address | Shinichi Yoshioka, Ikuya Kawasaki, Shigezumi Matsui | 2002-07-23 |
| 6404694 | Semiconductor memory device with address comparing functions | Kazushige Ayukawa, Takao Watanabe | 2002-06-11 |
| 6389523 | Cache memory employing dynamically controlled data array start timing and a microprocessor using the same | Yasuhisa Shimazaki, Seiichi Nagata, Katuhiro Norisue, Koichiro Ishibashi, Junichi Nishimoto +1 more | 2002-05-14 |
| 6380798 | Semiconductor integrated circuit apparatus | Hiroyuki Mizuno, Koichiro Ishibashi | 2002-04-30 |
| 6354901 | Discharge lamp, discharge lamp sealing method, discharge lamp sealing device | Tetsuaki Bundo, Koji Kita, Nobuyuki Yamada, Hiroaki Nagai, Hirotaka Ishibashi +1 more | 2002-03-12 |
| 6229752 | Semiconductor integrated circuit device | Kazushige Ayukawa, Takao Watanabe | 2001-05-08 |
| 6092172 | Data processor and data processing system having two translation lookaside buffers | Junichi Nishimoto, Osamu Nishii, Fumio Arakawa, Masayuki Ito, Makoto Toda +1 more | 2000-07-18 |
| 6070234 | Cacche memory employing dynamically controlled data array start timing and a microcomputer using the same | Yasuhisa Shimazaki, Seiichi Nagata, Katuhiro Norisue, Koichiro Ishibashi, Junichi Nishimoto +1 more | 2000-05-30 |
| 6049844 | Microprocessor having a PC card type interface | Shigezumi Matsui, Ikuya Kawasaki, Masato Nemoto | 2000-04-11 |
| 6047354 | Data processor for implementing virtual pages using a cache and register | Shinichi Yoshioka, Ikuya Kawasaki, Saneaki Tamaki | 2000-04-04 |
| 6038661 | Single-chip data processor handling synchronous and asynchronous exceptions by branching from a first exception handler to a second exception handler | Shinichi Yoshioka, Ikuya Kawasaki, Shigezumi Matsui | 2000-03-14 |
| 5907867 | Translation lookaside buffer supporting multiple page sizes | Toshinobu Shinbo, Suguru Tachibana, Shinichi Yoshioka, Koichiro Ishibashi, Hisayuki Higuchi +3 more | 1999-05-25 |
| 5860127 | Cache memory employing dynamically controlled data array start timing and a microcomputer using the same | Yasuhisa Shimazaki, Seiichi Nagata, Katuhiro Norisue, Koichiro Ishibashi, Junichi Nishimoto +1 more | 1999-01-12 |
| 5848247 | Microprocessor having PC card interface | Shigezumi Matsui, Ikuya Kawasaki, Masato Nemoto | 1998-12-08 |
| 5835963 | Processor with an addressable address translation buffer operative in associative and non-associative modes | Shinichi Yoshioka, Ikuya Kawasaki, Saneaki Tamaki | 1998-11-10 |
| 5796978 | Data processor having an address translation buffer operable with variable page sizes | Shinichi Yoshioka, Ikuya Kawasaki, Saneaki Tamaki | 1998-08-18 |
| 5778237 | Data processor and single-chip microcomputer with changing clock frequency and operating voltage | Mitsuyoshi Yamamoto, Ikuya Kawasaki, Hideo Inayoshi, Masaharu Kubo | 1998-07-07 |
| 5774701 | Microprocessor operating at high and low clok frequencies | Shigezumi Matsui, Mitsuyoshi Yamamoto, Shinichi Yoshioka, Ikuya Kawasaki, Susumu Kaneko +1 more | 1998-06-30 |
| 5585750 | Logic LSI | Kouki Noguchi, Kiyokazu Nishioka, Shinya Ohba | 1996-12-17 |
| 5507317 | Input apparatus | Yoshitake Yonekubo, Hideshi Koiwai | 1996-04-16 |
| 5454087 | Branching system for return from subroutine using target address in return buffer accessed based on branch type information in BHT | Fumio Arakawa, Kunio Uchiyama, Hirokazu Aoki | 1995-09-26 |
| 5408625 | Microprocessor capable of decoding two instructions in parallel | Fumio Arakawa, Tetsuhiko Okada, Kunio Uchiyama | 1995-04-18 |
| 5394558 | Data processor having an execution unit controlled by an instruction decoder and a microprogram ROM | Fumio Arakawa, Kunio Uchiyama | 1995-02-28 |
| 5348049 | Input apparatus | Yoshitake Yonekubo, Hideshi Koiwai | 1994-09-20 |