Issued Patents All Time
Showing 76–100 of 107 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7359048 | Raman signal-enhancing structures and devices | Shih-Yuan Wang, R. Stanley Williams, Raymond G. Beausoleil, Zhiyong Li, Wei Wu | 2008-04-15 |
| 7292334 | Binary arrays of nanoparticles for nano-enhanced Raman scattering molecular sensors | Alexandre M. Bratkovski | 2007-11-06 |
| 7245370 | Nanowires for surface-enhanced Raman scattering molecular sensors | Alexandre M. Bratkovski, M. Islam, Zhiyong Li, Shih-Yuan Wang | 2007-07-17 |
| 7235475 | Semiconductor nanowire fluid sensor and method for fabricating the same | — | 2007-06-26 |
| 7236242 | Nano-enhanced Raman spectroscopy-active nanostructures including elongated components and methods of making the same | R. Stanley Williams | 2007-06-26 |
| 7208094 | Methods of bridging lateral nanowires and device using same | M. Saif Islam, Shashank Sharma | 2007-04-24 |
| 7190075 | Method of forming smooth polycrystalline silicon electrodes for molecular electronic devices | — | 2007-03-13 |
| 7133577 | Optical modulator and methods of making and using optical modulator | Alexandre M. Bratkovski, Shih-Yuan Wang | 2006-11-07 |
| 7087920 | Nanowire, circuit incorporating nanowire, and methods of selecting conductance of the nanowire and configuring the circuit | — | 2006-08-08 |
| 6972233 | Field effect transistor fabrication including formation of a channel in a pore | — | 2005-12-06 |
| 6916740 | Method of forming smooth polycrystalline silicon electrodes for molecular electronic devices | — | 2005-07-12 |
| 6885031 | Integrated circuit including single crystal semiconductor layer on non-crystalline layer | — | 2005-04-26 |
| 6815750 | Field effect transistor with channel extending through layers on a substrate | — | 2004-11-09 |
| 6806141 | Field effect transistor with gate layer and method of making same | — | 2004-10-19 |
| 6791338 | Gated nanoscale switch having channel of molecular wires | Alexandre M. Bratkovski, Yong Chen | 2004-09-14 |
| 6773616 | Formation of nanoscale wires | Yong Chen, Douglas Ohlberg, R. Stanley Williams | 2004-08-10 |
| 6706204 | Method of fabricating and a device that includes nanosize pores having well controlled geometries | Daniel Roitman, Dietrich W. Vook | 2004-03-16 |
| 6620710 | Forming a single crystal semiconductor film on a non-crystalline surface | — | 2003-09-16 |
| 6429466 | Integrated circuit substrate that accommodates lattice mismatch stress | Yong Chen, Scott W. Corzine, Michael J. Ludowise, Pierre Mertz, Shih-Yuan Wang | 2002-08-06 |
| 6315384 | Thermal inkjet printhead and high-efficiency polycrystalline silicon resistor system for use therein | Ravi Ramaswami, Victor Joseph, Min Cao, John Whitlock, Anil Prem | 2001-11-13 |
| 6248674 | Method of aligning nanowires | Ying-Lan Chang | 2001-06-19 |
| 6211095 | Method for relieving lattice mismatch stress in semiconductor devices | Yong Chen, Scott W. Corzine, Michael J. Ludowise, Pierre Mertz, Shih-Yuan Wang | 2001-04-03 |
| 5633179 | Method of forming silicon/silicon-germanium heterojunction bipolar transistor | Albert William Wang | 1997-05-27 |
| 5557596 | Ultra-high density storage device | Gary Gibson, Marvin S. Keshner, Steven L. Neberhuis, Craig Perlov, Chung Ching Yang | 1996-09-17 |
| 5256550 | Fabricating a semiconductor device with strained Si.sub.1-x Ge.sub.x layer | Stephen Laderman, Martin Scott, Judy L. Hoyt, Clifford A. King, James F. Gibbons +1 more | 1993-10-26 |