Issued Patents All Time
Showing 51–75 of 130 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6628546 | Fast program to program verify method | Tomoko Ogura, Nori Ogura | 2003-09-30 |
| 6628547 | Fast program to program verify method | Tomoko Ogura, Nori Ogura | 2003-09-30 |
| 6611461 | Fast program to program verify method | Tomoko Ogura, Nori Ogura | 2003-08-26 |
| 6580116 | Double sidewall short channel split gate flash memory | — | 2003-06-17 |
| 6567314 | Data programming implementation for high efficiency CHE injection | Tomoko Ogura | 2003-05-20 |
| 6558997 | Method for fabricating the control and floating gate electrodes without having their upper surface silicided | Fumihiko Noro | 2003-05-06 |
| 6549463 | Fast program to program verify method | Tomoko Ogura, Nori Ogura | 2003-04-15 |
| 6545312 | Nonvolatile semiconductor memory device and method for fabricating the same | Masataka Kusumi, Fumihiko Noro, Hiromasa Fujimoto, Akihiro Kamada, Shinji Odanaka | 2003-04-08 |
| 6542412 | Process for making and programming and operating a dual-bit multi-level ballistic flash memory | Tomoko Ogura | 2003-04-01 |
| 6538275 | Nonvolatile semiconductor memory device and method for fabricating the same | Nobuyo Sugiyama, Hiromasa Fujimoto, Shinji Odanaka | 2003-03-25 |
| 6531350 | Twin MONOS cell fabrication method and array organization | Kimihiro Satoh, Tomoya Saito | 2003-03-11 |
| 6477088 | Usage of word voltage assistance in twin MONOS cell during program and erase | Tomoko Ogura, Tomoya Saito | 2002-11-05 |
| 6459622 | Twin MONOS memory cell usage for wide program | Tomoko Ogura | 2002-10-01 |
| 6418062 | Erasing methods by hot hole injection to carrier trap sites of a nonvolatile memory | Yutaka Hayashi, Tomoya Saito | 2002-07-09 |
| 6399441 | Nonvolatile memory cell, method of programming the same and nonvolatile memory array | Yutaka Hayashi | 2002-06-04 |
| 6388293 | Nonvolatile memory cell, operating method of the same and nonvolatile memory array | Yutaka Hayashi | 2002-05-14 |
| 6380585 | Nonvolatile semiconductor device capable of increased electron injection efficiency | Shinji Odanaka, Kaori Akamatsu, Junichi Kato, Atsushi Hori | 2002-04-30 |
| 6366500 | Process for making and programming and operating a dual-bit multi-level ballistic flash memory | Tomoko Ogura | 2002-04-02 |
| 6358799 | Nonvolatile semiconductor memory device and method for fabricating the same, and semiconductor integrated circuit device | Shinji Odanaka, Kaori Akamatsu, Junichi Kato, Atsushi Hori | 2002-03-19 |
| 6359807 | Process for making and programming and operating a dual-bit multi-level ballistic flash memory | Tomoko Ogura | 2002-03-19 |
| 6303438 | Method for manufacturing a nonvolatile semiconductor memory device having increased hot electron injection efficiency | Atsushi Hori, Junichi Kato, Shinji Odanaka | 2001-10-16 |
| 6255166 | Nonvolatile memory cell, method of programming the same and nonvolatile memory array | Yutaka Hayashi | 2001-07-03 |
| 6248633 | Process for making and programming and operating a dual-bit multi-level ballistic MONOS memory | Yutaba Hayashi, Tomoko Ogura | 2001-06-19 |
| 6184553 | Nonvolatile semiconductor memory device and method for fabricating the same, and semiconductor integrated circuit device | Shinji Odanaka, Kaori Akamatsu, Junichi Kato, Atsushi Hori | 2001-02-06 |
| 6180461 | Double sidewall short channel split gate flash memory | — | 2001-01-30 |