Issued Patents All Time
Showing 76–100 of 131 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8566556 | Memory module with memory stack and interface with enhanced capabilities | Keith R. Schakel, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2013-10-22 |
| 8566516 | Refresh management of memory modules | Keith R. Schakel, Michael J. Smith, David T. Wang | 2013-10-22 |
| 8446781 | Multi-rank partial width memory modules | Michael J. Smith | 2013-05-21 |
| 8438328 | Emulation of abstracted DIMMs using abstracted DRAMs | Michael J. Smith, David T. Wang | 2013-05-07 |
| 8407412 | Power management of memory circuits by virtual memory simulation | Michael J. Smith, David T. Wang | 2013-03-26 |
| 8386722 | Stacked DIMM memory interface | David T. Wang | 2013-02-26 |
| 8386833 | Memory systems and memory modules | Michael J. Smith | 2013-02-26 |
| 8370566 | System and method for increasing capacity, performance, and flexibility of flash storage | Radoslav Danilak, Michael J.S. Smith | 2013-02-05 |
| 8359187 | Simulating a different number of memory circuit devices | Keith R. Schakel, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2013-01-22 |
| 8340953 | Memory circuit simulation with power saving capabilities | Keith R. Schakel, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2012-12-25 |
| 8335894 | Configurable memory system with interface circuit | David T. Wang | 2012-12-18 |
| 8327104 | Adjusting the timing of signals associated with a memory system | Michael J. Smith, Daniel L. Rosenband, David T. Wang | 2012-12-04 |
| 8279690 | Optimal channel design for memory devices for providing a high-speed memory interface | Min Wang, Philip Ferolito, Michael J. Smith | 2012-10-02 |
| 8280714 | Memory circuit simulation system and method with refresh capabilities | Keith R. Schakel, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2012-10-02 |
| 8244971 | Memory circuit system and method | Keith R. Schakel, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2012-08-14 |
| 8213205 | Memory system including multiple memory stacks | — | 2012-07-03 |
| 8209479 | Memory circuit system and method | Keith R. Schakel, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2012-06-26 |
| 8181048 | Performing power management operations | Keith R. Schakel, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2012-05-15 |
| 8154935 | Delaying a signal communicated from a system to at least one of a plurality of memory circuits | Keith R. Schakel, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2012-04-10 |
| 8130560 | Multi-rank partial width memory modules | Michael J. Smith | 2012-03-06 |
| 8122207 | Apparatus and method for power management of memory circuits by a system or component thereof | Michael J. Smith, David T. Wang | 2012-02-21 |
| 8112266 | Apparatus for simulating an aspect of a memory circuit | Keith R. Schakel, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2012-02-07 |
| 8111566 | Optimal channel design for memory devices for providing a high-speed memory interface | Min Wang, Philip Ferolito, Michael J. Smith | 2012-02-07 |
| 8090897 | System and method for simulating an aspect of a memory circuit | Keith R. Schakel, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2012-01-03 |
| 8089795 | Memory module with memory stack and interface with enhanced capabilities | Keith R. Schakel, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2012-01-03 |