SU

Sudharshan Sugavanesh Udhayakumar

Google: 2 patents #10,498 of 22,993Top 50%
📍 San Jose, CA: #17,604 of 32,062 inventorsTop 55%
🗺 California: #185,134 of 386,348 inventorsTop 50%
Overall (All Time): #1,738,706 of 4,157,543Top 45%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
12424509 Compliant pad spacer for three-dimensional integrated circuit package Emad Samadiani, Padam Jain, Yingshi Tang, Sue Yun Teng, Nicholas Chao Wei Wong +1 more 2025-09-23
11955406 Temperature control element utilized in device die packages Yingying Wang, Emad Samadiani, Madhusudan K. Iyengar, Padam Jain, Xiaojin Wei +2 more 2024-04-09