MS

Michael J. Smith

Google: 72 patents #80 of 22,993Top 1%
Apple: 53 patents #507 of 18,612Top 3%
GE: 17 patents #1,712 of 36,430Top 5%
KW Kimberly-Clark Worldwide: 15 patents #410 of 3,587Top 15%
AF Arrow Art Finishers: 13 patents #1 of 3Top 35%
UM United Color Manufacturing: 11 patents #1 of 7Top 15%
AL Arrow Art Finishers, L.L.C.: 10 patents #1 of 2Top 50%
ME Metaram: 7 patents #2 of 5Top 40%
IP International Paper: 5 patents #97 of 935Top 15%
FP Fireking Security Products: 4 patents #1 of 10Top 10%
HP Heatcraft Refrigeration Products: 3 patents #18 of 93Top 20%
QG Qiagen Healthcare Biotechnologies Systems Gmbh: 3 patents #1 of 21Top 5%
NV NVIDIA: 2 patents #2,855 of 7,811Top 40%
AS American Family Mutual Insurance Company, S.L.: 2 patents #1 of 13Top 8%
Shell Oil Compny: 1 patents #2,223 of 4,423Top 55%
DU Duracell: 1 patents #120 of 239Top 55%
FU Faurecia Emissions Control Technologies, Usa: 1 patents #51 of 112Top 50%
Rohm And Haas: 1 patents #1,282 of 2,359Top 55%
AI Axiohm Ipb: 1 patents #5 of 11Top 50%
TA Tanium: 1 patents #41 of 60Top 70%
U.S. Philips: 1 patents #4,133 of 8,851Top 50%
Yamaha: 1 patents #1,232 of 2,001Top 65%
General Motors: 1 patents #9,361 of 18,328Top 55%
📍 Palo Alto, CA: #15 of 9,675 inventorsTop 1%
🗺 California: #376 of 386,348 inventorsTop 1%
Overall (All Time): #2,196 of 4,157,543Top 1%
241
Patents All Time

Issued Patents All Time

Showing 126–150 of 241 patents

Patent #TitleCo-InventorsDate
8418055 Identifying a document by performing spectral analysis on the contents of the document Martin T. King, Redwood Stephens, Claes-Fredrik Mannby, Jesse Peterson, Mark Sanvitale 2013-04-09
8407412 Power management of memory circuits by virtual memory simulation Suresh Rajan, David T. Wang 2013-03-26
8397013 Hybrid memory module Daniel L. Rosenband, Frederick Daniel Weber 2013-03-12
8386833 Memory systems and memory modules Suresh Rajan 2013-02-26
8359187 Simulating a different number of memory circuit devices Suresh Rajan, Keith R. Schakel, David T. Wang, Frederick Daniel Weber 2013-01-22
8352733 Resource restriction systems and methods Jussi-Pekka Mantere, Alexander Tony Maluta, John William Scalo, Eugene Ray Tyacke, Bruce Gaya +2 more 2013-01-08
8340953 Memory circuit simulation with power saving capabilities Suresh Rajan, Keith R. Schakel, David T. Wang, Frederick Daniel Weber 2012-12-25
8332559 Power managed lock optimization Josh P. de Cesare, Ruchi Wadhawan, Puneet Kumar, Bernard J. Semeria 2012-12-11
8327104 Adjusting the timing of signals associated with a memory system Daniel L. Rosenband, David T. Wang, Suresh Rajan 2012-12-04
8291480 Trusting an unverified code image in a computing device Joshua P. de Cesare, Dallas B. De Atley, John Andrew Wright 2012-10-16
8279690 Optimal channel design for memory devices for providing a high-speed memory interface Min Wang, Philip Ferolito, Suresh Rajan 2012-10-02
8280714 Memory circuit simulation system and method with refresh capabilities Suresh Rajan, Keith R. Schakel, David T. Wang, Frederick Daniel Weber 2012-10-02
8254568 Secure booting a computing device Joshua P. de Cesare, Dallas B. De Atley, John Andrew Wright 2012-08-28
8244971 Memory circuit system and method Suresh Rajan, Keith R. Schakel, David T. Wang, Frederick Daniel Weber 2012-08-14
8239688 Securely recovering a computing device Dallas B. De Atley, Joshua P. de Cesare, Matthew Reda, Shantonu Sen, John Andrew Wright 2012-08-07
8230412 Compatible trust in a computing device Dallas B. De Atley, Joshua P. de Cesare, Jerry Hauck, Jeffrey Bush 2012-07-24
8209479 Memory circuit system and method Suresh Rajan, Keith R. Schakel, David T. Wang, Frederick Daniel Weber 2012-06-26
8181048 Performing power management operations Suresh Rajan, Keith R. Schakel, David T. Wang, Frederick Daniel Weber 2012-05-15
8171277 Method and apparatus for booting from a flash memory without prior knowledge of flash parameter information Nir Jacob Wakrat, Tahoma M. Toelkes 2012-05-01
8169233 Programming of DIMM termination resistance values Philip Ferolito, Daniel L. Rosenband, David T. Wang 2012-05-01
8156275 Power managed lock optimization Josh P. de Cesare, Ruchi Wadhawan, Puneet Kumar, Bernard J. Semeria 2012-04-10
8154935 Delaying a signal communicated from a system to at least one of a plurality of memory circuits Suresh Rajan, Keith R. Schakel, David T. Wang, Frederick Daniel Weber 2012-04-10
8150039 Single security model in booting a computing device Joshua P. de Cesare, Dallas B. De Atley, Jonathan J. Andrews 2012-04-03
8145928 Methods and systems for power management in a data processing system Joshua P. de Cesare, Bernard J. Semeria 2012-03-27
8130560 Multi-rank partial width memory modules Suresh Rajan 2012-03-06