Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12424493 | Self-aligned double patterning with mandrel manipulation | James P. Mazza, David Pritchard, Romain H.A. Feuillette, Elizabeth Strehlow | 2025-09-23 |
| 12426278 | Resistive memory elements accessed by bipolar junction transistors | Venkatesh P. Gopinath, Alexander M. Derrickson | 2025-09-23 |
| 12356675 | Planar transistor device comprising at least one layer of a two-dimensional (2D) material | David Pritchard, Heng Yang, Neha Nayyar, Manjunatha Prabhu, Elizabeth Strehlow +1 more | 2025-07-08 |
| 11610843 | Well tap for an integrated circuit product and methods of forming such a well tap | David Pritchard, Ryan Sporer, Manjunatha Prabhu | 2023-03-21 |
| 11581430 | Planar transistor device comprising at least one layer of a two-dimensional (2D) material and methods for making such transistor devices | David Pritchard, Heng Yang, Neha Nayyar, Manjunatha Prabhu, Elizabeth Strehlow +1 more | 2023-02-14 |
| 11239087 | Fully depleted devices with slots in active regions | Heng Yang, David Pritchard, George J. Kluth, Anurag Mittal, Manjunatha Prabhu +3 more | 2022-02-01 |
| 11177182 | Vertical transistor device comprising a two-dimensional (2D) material positioned in a channel region of the device and methods of making such vertical transistor devices | Heng Yang, David Pritchard, Kai Sun, Neha Nayyar, Manjunatha Prabhu +2 more | 2021-11-16 |
| 11094791 | Vertical transistor device with source/drain regions comprising a twi-dimensional (2D) material and methods of making such vertical transistor devices | Heng Yang, David Pritchard, Kai Sun, Neha Nayyar, Manjunatha Prabhu +2 more | 2021-08-17 |
| 10727108 | Dummy gate isolation and method of production thereof | David Pritchard, Heng Yang | 2020-07-28 |
| 10497576 | Devices with slotted active regions | Heng Yang, David Pritchard, George J. Kluth, Anurag Mittal, Manjunatha Prabhu +3 more | 2019-12-03 |