Issued Patents All Time
Showing 51–75 of 87 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6275086 | Clock signal generator for an integrated circuit | Hiroko Douchi | 2001-08-14 |
| 6272069 | LSI device with memory and logics mounted thereon | Yasurou Matsuzaki, Masao Taguchi | 2001-08-07 |
| 6266294 | Integrated circuit device | Masahiro Yada | 2001-07-24 |
| 6252804 | Semiconductor integrated circuit, and method of controlling same | — | 2001-06-26 |
| 6242954 | Timing clock generation circuit using hierarchical DLL circuit | Nobutaka Taniguchi | 2001-06-05 |
| 6239631 | Integrated circuit device with input buffer capable of correspondence with highspeed clock | Shinya Fujioka | 2001-05-29 |
| 6225843 | Semiconductor integrated circuit device | Nobutaka Taniguchi | 2001-05-01 |
| 6208582 | Memory device including a double-rate input/output circuit | Tatsuya Kanda | 2001-03-27 |
| 6205082 | LSI device with memory and logics mounted thereon | Yasurou Matsuzaki, Masao Taguchi | 2001-03-20 |
| 6198689 | Integrated circuit device with built-in self timing control circuit | Masafumi Yamazaki, Yasurou Matsuzaki | 2001-03-06 |
| 6194932 | Integrated circuit device | Yoshihiro Takemae, Yasurou Matsuzaki, Nobutaka Taniguchi | 2001-02-27 |
| 6181184 | Variable delay circuit and semiconductor intergrated circuit device | Masafumi Yamazaki | 2001-01-30 |
| 6181174 | Semiconductor integrated circuit device | Waichirou Fujieda, Yasuharu Sato, Nobutaka Taniguchi, Yasurou Matsuzaki | 2001-01-30 |
| 6154405 | Semiconductor memory device having a dummy cell resetting the bit lines to a reset potential that is based on data read in a previous read data | Yoshihiro Takemae, Masao Taguchi, Masao Nakano, Hirohiko Mochizuki, Yasurou Matsuzaki +1 more | 2000-11-28 |
| 6151274 | System configured of synchronous semiconductor device for adjusting timing of each input and semiconductor device used therefor | Yoshihiro Takemae, Masao Taguchi, Yasurou Matsuzaki, Hirohiko Mochizuki, Atsushi Hatakeyama +1 more | 2000-11-21 |
| 6144614 | Semiconductor integrated circuit having a clock and latch circuits for performing synchronous switching operations | Tatsuya Kanda | 2000-11-07 |
| 6144595 | Semiconductor device performing test operation under proper conditions | Osamu Hirooka, Tatsuya Kanda | 2000-11-07 |
| 6115322 | Semiconductor device accepting data which includes serial data signals, in synchronization with a data strobe signal | Tatsuya Kanda | 2000-09-05 |
| 6108793 | Semiconductor device having timing-stabilization circuit and method of testing such semiconductor device | Yasuhiro Fujii, Nobutaka Taniguchi, Yasurou Matsuzaki | 2000-08-22 |
| 6078514 | Semiconductor device and semiconductor system for high-speed data transfer | Yoshihiro Takemae, Masao Taguchi, Masao Nakano, Takaaki Suzuki, Toshiya Uchida +4 more | 2000-06-20 |
| 6075393 | Clock synchronous semiconductor device system and semiconductor devices used with the same | Yoshihiro Takemae | 2000-06-13 |
| 6066969 | Semiconductor device with DLL circuit avoiding excessive power consumption | Kenichi Kawasaki, Yasuharu Sato | 2000-05-23 |
| 6064625 | Semiconductor memory device having a short write time | — | 2000-05-16 |
| 6063640 | Semiconductor wafer testing method with probe pin contact | Masataka Mizukoshi, Hidehiko Akasaki, Masao Nakano, Yasuhiro Fujii, Shinnosuke Kamata +4 more | 2000-05-16 |
| 6031788 | Semiconductor integrated circuit | Yoshihide Bando, Nobutaka Taniguchi | 2000-02-29 |