Issued Patents All Time
Showing 1–25 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9305736 | Phosphor for dispersion-type EL, dispersion-type EL device, and method of manufacturing the same | Koichi Wani, Emi Hashimoto, Kazushi Kawakami, Sadahiro Yagishita, Fumitaka Iwakura +1 more | 2016-04-05 |
| 8077537 | Memory device, memory controller and memory system | Tomohiro Kawakubo, Syusaku Yamaguchi, Hitoshi Ikeda, Toshiya Uchida, Hiroyuki Kobayashi +8 more | 2011-12-13 |
| 8015389 | Memory device, memory controller and memory system | Takahiko Sato, Toshiya Uchida, Tetsuo Miyamoto, Satoru Shirakawa, Yoshinobu Yamamoto +5 more | 2011-09-06 |
| 8004921 | Memory device, memory controller and memory system | Tomohiro Kawakubo, Syusaku Yamaguchi, Hitoshi Ikeda, Toshiya Uchida, Hiroyuki Kobayashi +8 more | 2011-08-23 |
| 7814294 | Memory device, memory controller and memory system | Takahiko Sato, Toshiya Uchida, Tetsuo Miyamoto, Satoru Shirakawa, Yoshinobu Yamamoto +5 more | 2010-10-12 |
| 7774577 | Memory device, memory controller and memory system | Takahiko Sato, Toshiya Uchida, Tetsuo Miyamoto, Satoru Shirakawa, Yoshinobu Yamamoto +5 more | 2010-08-10 |
| 7729200 | Memory device, memory controller and memory system | Hitoshi Ikeda, Takahiko Sato, Toshiya Uchida, Hiroyuki Kobayashi, Satoru Shirakawa +7 more | 2010-06-01 |
| 7684258 | Semiconductor memory and controller with time-shared mode for row address, column address and data mask signals inputted via address terminals | Kotoku Sato | 2010-03-23 |
| 7668040 | Memory device, memory controller and memory system | Hitoshi Ikeda, Takahiko Sato, Toshiya Uchida, Hiroyuki Kobayashi, Satoru Shirakawa +7 more | 2010-02-23 |
| 7471585 | Semiconductor memory | Naoharu Shinozaki, Takahiko Sato, Akihiro Funyu | 2008-12-30 |
| 7184358 | Semiconductor memory | Hiroyuki Kobayashi | 2007-02-27 |
| 7113441 | Semiconductor memory | Naoharu Shinozaki, Takahiko Sato, Akihiro Funyu | 2006-09-26 |
| 7114025 | Semiconductor memory having test function for refresh operation | Akihiro Funyu, Takahiko Sato, Yoshiaki Okuyama, Jun Ohno, Hitoshi Ikeda | 2006-09-26 |
| 6907555 | Self-test circuit and memory device incorporating it | Yukihiro Nomura, Hiroyuki Fujimoto, Takahiro Suzuki, Yasurou Matsuzaki, Masahiko Saitou +1 more | 2005-06-14 |
| 6845055 | Semiconductor memory capable of transitioning from a power-down state in a synchronous mode to a standby state in an asynchronous mode without setting by a control register | Toru Koga, Tomohiro Kawakubo | 2005-01-18 |
| 6813696 | Semiconductor memory device and method of controlling the same | Hiroyoshi Tomita | 2004-11-02 |
| 6671787 | Semiconductor memory device and method of controlling the same | Hiroyoshi Tomita | 2003-12-30 |
| 6396758 | Semiconductor memory device | Hitoshi Ikeda, Yoshitaka Takahashi, Shinya Fujioka, Akihiro Funyu | 2002-05-28 |
| 6320819 | Semiconductor device reconciling different timing signals | Hiroyoshi Tomita | 2001-11-20 |
| 6295245 | Write data input circuit | Hiroyoshi Tomita | 2001-09-25 |
| 6292428 | Semiconductor device reconciling different timing signals | Hiroyoshi Tomita | 2001-09-18 |
| 6208582 | Memory device including a double-rate input/output circuit | Hiroyoshi Tomita | 2001-03-27 |
| 6144595 | Semiconductor device performing test operation under proper conditions | Osamu Hirooka, Hiroyoshi Tomita | 2000-11-07 |
| 6144614 | Semiconductor integrated circuit having a clock and latch circuits for performing synchronous switching operations | Hiroyoshi Tomita | 2000-11-07 |
| 6115322 | Semiconductor device accepting data which includes serial data signals, in synchronization with a data strobe signal | Hiroyoshi Tomita | 2000-09-05 |