Issued Patents All Time
Showing 51–75 of 119 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7005342 | Method to fabricate surface p-channel CMOS | Suraj Mathew | 2006-02-28 |
| 6987291 | Integrated transistor circuitry | Todd R. Abbott, Zhongze Wang, Chih-Chen Cho | 2006-01-17 |
| 6953749 | Methods of forming refractory metal silicide components and methods of restricting silicon surface migration of a silicon structure | Yongjun Jeff Hu | 2005-10-11 |
| 6927473 | Semiconductor fuses and semiconductor devices containing the same | Zhongze Wang, Michael P. Violette | 2005-08-09 |
| 6893957 | Method of forming a dual damascene interconnect by selective metal deposition | Mike Violette | 2005-05-17 |
| 6875697 | Dual depth trench isolation | — | 2005-04-05 |
| 6872660 | Methods of forming conductive contacts | Zhongze Wang, Chi-Chen Cho | 2005-03-29 |
| 6858525 | Stacked local interconnect structure and method of fabricating same | — | 2005-02-22 |
| 6844601 | Local interconnect structure for integrated circuit devices, source structure for the same, and method for fabricating the same | Michael P. Violette | 2005-01-18 |
| 6831001 | Method of fabricating a stacked local interconnect structure | — | 2004-12-14 |
| 6818997 | Semiconductor constructions | — | 2004-11-16 |
| 6809014 | Method to fabricate surface p-channel CMOS | Suraj Mathew | 2004-10-26 |
| 6806134 | Sidewall strap for complementary semiconductor structures and method of making same | Todd R. Abbott, Zhongze Wang | 2004-10-19 |
| 6797596 | Sacrificial deposition layer as screening material for implants into a wafer during the manufacture of a semiconductor device | Fawad Ahmed, Suraj Mathew | 2004-09-28 |
| 6790781 | Dual depth trench isolation | — | 2004-09-14 |
| 6770921 | Sidewall strap for complementary semiconductor structures and method of making same | Todd R. Abbott, Zhongze Wang | 2004-08-03 |
| 6744102 | MOS transistors with nitrogen in the gate oxide of the p-channel transistor | Zhongze Wang, Rongsheng Yang | 2004-06-01 |
| 6740575 | Method for forming an antifuse | — | 2004-05-25 |
| 6724089 | Dual damascene interconnect | Mike Violette | 2004-04-20 |
| 6703263 | Semiconductor fuses, methods of using the same, methods of making the same, and semiconductor devices containing the same | Zhongze Wang, Michael P. Violette | 2004-03-09 |
| 6683365 | Edge intensive antifuse device structure | — | 2004-01-27 |
| 6677650 | Silicon plugs and local interconnect for embedded memory and system-on-chip (SOC) applications | Mark Fischer, Charles H. Dennison, Todd R. Abbott, Raymond A. Turi | 2004-01-13 |
| 6673715 | Methods of forming conductive contacts | Zhongze Wang, Chi-Chen Cho | 2004-01-06 |
| 6670681 | Semiconductor structures | — | 2003-12-30 |
| 6639319 | Conductive structure in an integrated circuit | Ravi Iyer | 2003-10-28 |