Issued Patents All Time
Showing 25 most recent of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10148106 | Power connector with load current sensing | — | 2018-12-04 |
| 9685806 | Power connector with load current sensing | — | 2017-06-20 |
| 9537258 | Self unplugging power connector with load current sensing | — | 2017-01-03 |
| 8710584 | FET device having ultra-low on-resistance and low gate charge | Brian Mo, Ashok Challa | 2014-04-29 |
| 8476133 | Method of manufacture and structure for a trench transistor having a heavy body region | Brian Mo, Duc Chau, Steven Sapp, Dean E. Probst | 2013-07-02 |
| 8101484 | Method of forming a FET having ultra-low on-resistance and low gate charge | Brian Mo, Ashok Challa | 2012-01-24 |
| 8044463 | Method of manufacturing a trench transistor having a heavy body region | Brian Mo, Duc Chau, Steven Sapp, Dean E. Probst | 2011-10-25 |
| 7745289 | Method of forming a FET having ultra-low on-resistance and low gate charge | Brian Mo, Ashok Challa | 2010-06-29 |
| 7736978 | Method of manufacturing a trench transistor having a heavy body region | Brian Mo, Duc Chau, Steven Sapp, Dean E. Probst | 2010-06-15 |
| 7696571 | Method of manufacturing a trench transistor having a heavy body region | Brian Mo, Duc Chau, Steven Sapp, Dean E. Probst | 2010-04-13 |
| 7511339 | Field effect transistor and method of its manufacture | Brian Mo, Duc Chau, Steven Sapp, Dean E. Probst | 2009-03-31 |
| 7148111 | Method of manufacturing a trench transistor having a heavy body region | Brian Mo, Duc Chau, Steven Sapp, Dean E. Probst | 2006-12-12 |
| 6828195 | Method of manufacturing a trench transistor having a heavy body region | Brian Mo, Duc Chau, Steven Sapp, Dean E. Probst | 2004-12-07 |
| 6710406 | Field effect transistor and method of its manufacture | Brian Mo, Duc Chau, Steven Sapp, Dean E. Probst | 2004-03-23 |
| 6696726 | Vertical MOSFET with ultra-low resistance and low gate charge | Brian Mo, Ashok Challa | 2004-02-24 |
| 6429481 | Field effect transistor and method of its manufacture | Brian Mo, Duc Chau, Steven Sapp, Dean E. Probst | 2002-08-06 |
| 6423623 | Low Resistance package for semiconductor devices | Maria Christina B. Estacio, Steven Sapp, Consuelo Tangpuz, Gilmore S. Baje, Rey D. Maligro | 2002-07-23 |
| 5879994 | Self-aligned method of fabricating terrace gate DMOS transistor | Sze-Hon Kwan, Steven Sapp | 1999-03-09 |
| 5767550 | Integrated zener diode overvoltage protection structures in power DMOS device applications | Daniel Calafut, Steven Sapp | 1998-06-16 |
| 5665619 | Method of fabricating a self-aligned contact trench DMOS transistor structure | Sze-Hon Kwan | 1997-09-09 |
| 5605852 | Method for fabricating high voltage transistor having trenched termination | — | 1997-02-25 |
| 5602046 | Integrated zener diode protection structures and fabrication methods for DMOS power devices | Daniel Calafut, Steven Sapp | 1997-02-11 |
| 5567634 | Method of fabricating self-aligned contact trench DMOS transistors | Francois Hebert, Sze-Hon Kwan | 1996-10-22 |
| 5430324 | High voltage transistor having edge termination utilizing trench technology | — | 1995-07-04 |
| 5136349 | Closed cell transistor with built-in voltage clamp | Hamza Yilmaz | 1992-08-04 |