JC

Jordi Cortadella

ES Esilicon: 3 patents #6 of 22Top 30%
CS Cadence Design Systems: 1 patents #1,216 of 2,263Top 55%
PL Plastibec: 1 patents #49 of 130Top 40%
IN Intel: 1 patents #18,218 of 30,777Top 60%
📍 Gelida, ES: #1 of 2 inventorsTop 50%
Overall (All Time): #743,783 of 4,157,543Top 20%
7
Patents All Time

Issued Patents All Time

Showing 1–7 of 7 patents

Patent #TitleCo-InventorsDate
8572539 Variability-aware scheme for high-performance asynchronous circuit voltage regulation Vigyan Singhal, Emre Tuncer, Luciano Lavagno 2013-10-29
8446224 Network of tightly coupled performance monitors for determining the maximum frequency of operation of a semiconductor IC Luciano Lavagno, Emre Tuncer 2013-05-21
8433875 Asynchronous scheme for clock domain crossing Luciano Lavagno, Carlos Macian, Ferran Martorell 2013-04-30
7870516 Asynchronous, multi-rail, asymmetric-phase, static digital logic with completion detection and method for designing the same Christos P. Sotiriou, Alex Kondratyev, Luciano Lavagno 2011-01-11
7701255 Variability-aware scheme for asynchronous circuit initialization Vigyan Singhal, Emre Tuncer 2010-04-20
7657862 Synchronous elastic designs with early evaluation Michael Kishinevsky 2010-02-02
7634749 Skew insensitive clocking method and apparatus Alex Kondratyev, Luciano Lavagno 2009-12-15