Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11942409 | High density low power interconnect using 3D die stacking | Prasad Subramaniam | 2024-03-26 |
| 11233002 | High density low power interconnect using 3D die stacking | Prasad Subramaniam | 2022-01-25 |
| 9460254 | Scaling logic components of integrated circuit design | Prasad Subramaniam, Hao Nham, Rakesh Chadha | 2016-10-04 |
| 9460255 | Scaling of integrated circuit design including logic and memory components | Prasad Subramaniam, Hao Nham, Rakesh Chadha | 2016-10-04 |
| 9460256 | Integrated circuit design scaling for recommending design point | Prasad Subramaniam, Hao Nham, Rakesh Chadha | 2016-10-04 |
| 9460257 | Scaling of integrated circuit design including high-level logic components | Prasad Subramaniam, Hao Nham, Rakesh Chadha | 2016-10-04 |
| 9454636 | Integrated circuit design optimization | Prasad Subramaniam, Hao Nham, Rakesh Chadha | 2016-09-27 |
| 9454628 | Scaling memory components of integrated circuit design | Prasad Subramaniam, Hao Nham, Rakesh Chadha | 2016-09-27 |
| 8433875 | Asynchronous scheme for clock domain crossing | Jordi Cortadella, Luciano Lavagno, Carlos Macian | 2013-04-30 |