AK

Alex Kondratyev

CS Cadence Design Systems: 6 patents #235 of 2,263Top 15%
TL Theseus Logic: 1 patents #7 of 8Top 90%
📍 Campbell, CA: #555 of 2,187 inventorsTop 30%
🗺 California: #73,997 of 386,348 inventorsTop 20%
Overall (All Time): #654,648 of 4,157,543Top 20%
8
Patents All Time

Issued Patents All Time

Showing 1–8 of 8 patents

Patent #TitleCo-InventorsDate
8286108 System and method for synthesis reuse Luciano Lavagno, Yoshinori Watanabe 2012-10-09
7870516 Asynchronous, multi-rail, asymmetric-phase, static digital logic with completion detection and method for designing the same Christos P. Sotiriou, Jordi Cortadella, Luciano Lavagno 2011-01-11
7673259 System and method for synthesis reuse Luciano Lavagno, Yosinori Watanabe 2010-03-02
7634749 Skew insensitive clocking method and apparatus Jordi Cortadella, Luciano Lavagno 2009-12-15
7587687 System and method for incremental synthesis Yosinori Watanabe, Michael Meyer, Luciano Lavagno 2009-09-08
7472361 System and method for generating a plurality of models at different levels of abstraction from a single master model Yosinori Watanabe, Luciano Lavagno 2008-12-30
7363605 Eliminating false positives in crosstalk noise analysis Kenneth Tseng, Yosinori Watanabe 2008-04-22
6526542 Multi-rail asynchronous flow with completion detection and system and method for designing the same 2003-02-25