Issued Patents All Time
Showing 76–89 of 89 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6818936 | Scaled EEPROM cell by metal-insulator-metal (MIM) coupling | Chrong-Jun Lin | 2004-11-16 |
| 6816210 | Method for forming a self-aligned pixel electrode of an LCD | — | 2004-11-09 |
| 6812083 | Fabrication method for non-volatile memory | Shih-Jye Shen, Wei-Zhe Wong, Ming-Chou Ho | 2004-11-02 |
| 6787405 | Method of fabricating liquid crystal display devices integrated with driving circuit | — | 2004-09-07 |
| 6734055 | Multi-level (4 state/2-bit) stacked gate flash memory cell | Chrong-Jung Lin, Shui-Hung Chen | 2004-05-11 |
| 6703266 | Method for fabricating thin film transistor array and driving circuit | Yaw-Ming Tsai, Chu-Jung Shih | 2004-03-09 |
| 6586765 | Wafer-level antenna effect detection pattern for VLSI | Chrong-Jung Lin | 2003-07-01 |
| 6576558 | High aspect ratio shallow trench using silicon implanted oxide | Chrong-Jung Lin | 2003-06-10 |
| 6501522 | Method of fabricating a reflective type LCD | Wei-Chih Chang, Yun-Chieh Yuan, Yao-Nan Chen | 2002-12-31 |
| 6417046 | Modified nitride spacer for solving charge retention issue in floating gate memory cell | Ming-Chou Ho, Wen-Ting Chu, Chang-Song Lin, Chuan-Li Chang, Di-Son Kuo | 2002-07-09 |
| 6407790 | Method of fabricating a liquid crystal display | — | 2002-06-18 |
| 6372525 | Wafer-level antenna effect detection pattern for VLSI | Chrong-Jung Lin | 2002-04-16 |
| 6245657 | Self-aligned, low contact resistance, via fabrication process | Wen-Ting Chu | 2001-06-12 |
| 6108242 | Flash memory with split gate structure and method of fabricating the same | Chrong-Jung Lin | 2000-08-22 |