Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8957398 | Via-configurable high-performance logic block involving transistor chains | Alexander E. Andreev, Sergey Gribok, Ranko Scepanovic, Chee-Wei Kung | 2015-02-17 |
| 8629548 | Clock network fishbone architecture for a structured ASIC manufactured on a 28 NM CMOS process lithographic node | Alexander E. Andreev, Andrey V. Nikishin, Sergey Gribok, Choon-Hun Choo | 2014-01-14 |