Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8629548 | Clock network fishbone architecture for a structured ASIC manufactured on a 28 NM CMOS process lithographic node | Alexander E. Andreev, Andrey V. Nikishin, Sergey Gribok, Phey-Chuin Tan | 2014-01-14 |