Issued Patents All Time
Showing 26–41 of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8164363 | Aysmmetric sense-amp flip-flop | — | 2012-04-24 |
| 8089823 | Processor instruction cache with dual-read modes | Sehat Sutardja, Hong-Yi Chen, Jason Sheu, Jensen Tjeng | 2012-01-03 |
| 8027218 | Processor instruction cache with dual-read modes | Sehat Sutardja, Hong-Yi Chen, Jason Sheu, Jensen Tjeng | 2011-09-27 |
| 7990199 | Clock gater system | — | 2011-08-02 |
| 7965123 | High boosting-ratio/low-switching-delay level shifter | — | 2011-06-21 |
| 7855587 | Asymmetric sense-amp flip-flop | — | 2010-12-21 |
| 7848173 | Address decoder | — | 2010-12-07 |
| 7835217 | Write-assist and power-down circuit for low power SRAM applications | Karthik V. Swaminathan | 2010-11-16 |
| 7787324 | Processor instruction cache with dual-read modes | Sehat Sutardja, Hong-Yi Chen, Jason Sheu, Jensen Tjeng | 2010-08-31 |
| 7777550 | High boosting-ratio/low-switching-delay level shifter | — | 2010-08-17 |
| 7639057 | Clock gater system | — | 2009-12-29 |
| 7596012 | Write-assist and power-down circuit for low power SRAM applications | Karthik V. Swaminathan | 2009-09-29 |
| 7113301 | System and method for automated access of a network page | — | 2006-09-26 |
| 6977749 | System and method for printing images on labels and forms in a printing device | Kevin G. Currans | 2005-12-20 |
| 6408264 | Switch level simulation with cross-coupled devices | Howard C. Kirsch, Lidong Chen | 2002-06-18 |
| 6275435 | Bi-directional sense amplifier stage for memory datapath | Ching-Hua Hsiao, Lidon Chen, Howard C. Kirsh | 2001-08-14 |