Issued Patents All Time
Showing 1–25 of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12271675 | Location-aware protection system of latches (LAPS-L) | Alper Buyuktosunoglu, Pradip Bose, Bulent Abali | 2025-04-08 |
| 11810340 | System and method for consensus-based representation and error checking for neural networks | Pradip Bose, Alper Buyuktosunoglu, Schuyler Eldridge, Swagath Venkataramani | 2023-11-07 |
| 11720469 | Customizing stressmarks in a computer system | Ramon Bertran Monfort, Alper Buyuktosunoglu, Pradip Bose | 2023-08-08 |
| 11630152 | Determination and correction of physical circuit event related errors of a hardware design | Pradip Bose, Alper Buyuktosunoglu, Schuyler Eldridge, Yazhou Zu | 2023-04-18 |
| 11599795 | Reducing the cost of n modular redundancy for neural networks | Pradip Bose, Alper Buyuktosunoglu, Schuyler Eldridge, Augusto J. Vega, Swagath Venkataramani | 2023-03-07 |
| 11334786 | System and method for an error-aware runtime configurable memory hierarchy for improved energy efficiency | Alper Buyuktosunoglu, Nandhini Chandramoorthy, Prashant Jayaprakash Nair | 2022-05-17 |
| 11037650 | Self-evaluating array of memory | Alper Buyuktosunoglu, Swagath Venkataramani, Rajiv V. Joshi, Schuyler Eldridge, Pradip Bose | 2021-06-15 |
| 11016840 | Low-overhead error prediction and preemption in deep neural network using apriori network statistics | Swagath Venkataramani, Schuyler Eldridge, Alper Buyuktosunoglu, Pradip Bose | 2021-05-25 |
| 11002791 | Determination and correction of physical circuit event related errors of a hardware design | Pradip Bose, Alper Buyuktosunoglu, Schuyler Eldridge, Yazhou Zu | 2021-05-11 |
| 10896146 | Reliability-aware runtime optimal processor configuration | Ramon Bertran Monfort, Alper Buyuktosunoglu, Pradip Bose, Nandhini Chandramoorthy, Chen-Yong Cher | 2021-01-19 |
| 10831543 | Contention-aware resource provisioning in heterogeneous processors | Nandhini Chandramoorthy, Ramon Bertran Monfort, Alper Buyuktosunoglu, Pradip Bose | 2020-11-10 |
| 10690723 | Determination and correction of physical circuit event related errors of a hardware design | Pradip Bose, Alper Buyuktosunoglu, Schuyler Eldridge, Yazhou Zu | 2020-06-23 |
| 10635490 | Optimization of application workflow in mobile embedded devices | Ramon Bertran Monfort, Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, Hans M. Jacobson +3 more | 2020-04-28 |
| 10607715 | Self-evaluating array of memory | Alper Buyuktosunoglu, Swagath Venkataramani, Rajiv V. Joshi, Schuyler Eldridge, Pradip Bose | 2020-03-31 |
| 10365327 | Determination and correction of physical circuit event related errors of a hardware design | Pradip Bose, Alper Buyuktosunoglu, Schuyler Eldridge, Yazhou Zu | 2019-07-30 |
| 9690555 | Optimization of application workflow in mobile embedded devices | Ramon Bertran Monfort, Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, Hans M. Jacobson +3 more | 2017-06-27 |
| 9424308 | Hierarchical in-memory sort engine | Alper Buyuktosunoglu, Srivatsan Chellappa, Toshiaki Kirihata | 2016-08-23 |
| 9396143 | Hierarchical in-memory sort engine | Alper Buyuktosunoglu, Srivatsan Chellappa, Toshiaki Kirihata | 2016-07-19 |
| 9268863 | Hierarchical in-memory sort engine | Alper Buyuktosunoglu, Srivatsan Chellappa, Toshiaki Kirihata | 2016-02-23 |
| 8760198 | Low voltage line driver | — | 2014-06-24 |
| 8661037 | System and method for multithreaded text indexing for next generation multi-core architectures | Ankur Narang, Prashant Agrawal, Doug Joseph | 2014-02-25 |
| 8582387 | Method and apparatus for supplying power to a static random access memory (SRAM) cell | Jason Su | 2013-11-12 |
| 8392181 | Subtraction of a shaped component of a noise reduction spectrum from a combined signal | Fitzgerald John Archibald, Anil Kumar Sirikande | 2013-03-05 |
| 8310894 | Write-assist and power-down circuit for low power SRAM applications | Jason Su | 2012-11-13 |
| 7835217 | Write-assist and power-down circuit for low power SRAM applications | Jason Su | 2010-11-16 |