Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11429444 | Managing distribution of I/O queue pairs of a target among hosts | Kumar Rahul, Krishna Puttagunta, Alice Terumi Clark, Rupin T. Mohan | 2022-08-30 |
| 9210060 | Flow control transmission | Siamack Ayandeh, Shilin Zhang | 2015-12-08 |
| 6077306 | Bus interface slicing mechanism allowing for a control/data path slice | Jeffrey A. Metzger, Nitin D. Godiwala, Kurt M. Thaller, Paul M. Goodwin, Donald W. Smelser +1 more | 2000-06-20 |
| 5918029 | Bus interface slicing mechanism allowing for a control/data-path slice | Jeffrey A. Metzger, Nitin D. Godiwala, Kurt M. Thaller, Paul M. Goodwin, Donald W. Smelser +1 more | 1999-06-29 |
| 5629950 | Fault management scheme for a cache memory | Nitin D. Godiwala, Kurt M. Thaller, Jeffrey A. Metzger | 1997-05-13 |
| 5555382 | Intelligent snoopy bus arbiter | Kurt M. Thaller, Nitin D. Godiwala | 1996-09-10 |
| 5553258 | Method and apparatus for forming an exchange address for a system with different size caches | Nitin D. Godiwala, Kurt M. Thaller | 1996-09-03 |
| 5553266 | Update vs. invalidate policy for a snoopy bus protocol | Jeffrey A. Metzger | 1996-09-03 |
| 5428764 | System for radial clock distribution and skew regulation for synchronous clocking of components of a computing system | — | 1995-06-27 |
| 5388224 | Processor identification mechanism for a multiprocessor system | — | 1995-02-07 |
| 5388247 | History buffer control to reduce unnecessary allocations in a memory stream buffer | Paul M. Goodwin, Kurt M. Thaller | 1995-02-07 |
| 5361267 | Scheme for error handling in a computer system | Nitin D. Godiwala, Kurt M. Thaller, Jeffrey A. Metzger | 1994-11-01 |
| 5319766 | Duplicate tag store for a processor having primary and backup cache memories in a multiprocessor computer system | Kurt M. Thaller, Jeffrey A. Metzger, Nitin D. Godiwala | 1994-06-07 |
| 5287517 | Self-compensating voltage level shifting circuit | Jeffrey A. Metzger, George J. Harris | 1994-02-15 |
| 5029074 | Bus adapter unit for digital processing system | Jesse B. Lipcon | 1991-07-02 |
| 4782486 | Self-testing memory | Jesse B. Lipcon, David K. Morgan | 1988-11-01 |
| 4744025 | Arrangement for expanding memory capacity | Jesse B. Lipcon | 1988-05-10 |