MH

Mark W. Hervin

CY Cyrix: 7 patents #8 of 51Top 20%
NE Netrake: 6 patents #3 of 12Top 25%
NS National Semiconductor: 3 patents #635 of 2,238Top 30%
VI Via-Cyrix: 3 patents #4 of 30Top 15%
CI Cisco: 1 patents #7,901 of 13,007Top 65%
Overall (All Time): #209,565 of 4,157,543Top 6%
21
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9256548 Rule-based virtual address translation for accessing data Donald E. Steiss, Marvin W. Martinez, Jr., John H. W. Bettink, John C. Carney 2016-02-09
7272115 Method and apparatus for enforcing service level agreements Robert Maher, James Deerman, Milton Andre Lie 2007-09-18
7031316 Content processor Robert Maher, Aswinkumar Vishanji Rana, Milton Andre Lie, Kevin William Brandon, Corey Alan Garrow 2006-04-18
7002974 Learning state machine for use in internet protocol networks James Deerman, Aswinkumar Vishanji Rana, Milton Andre Lie, Travis Ernest Strother, Jr., John Raymond Carman +2 more 2006-02-21
6957258 Policy gateway Robert Maher, Aswinkumar Vishanji Rana, Milton Andre Lie, Travis Ernest Strother, Jr., James Deerman +2 more 2005-10-18
6910134 Method and device for innoculating email infected with a virus Robert Maher, Brian Forbes, Milton Andre Lie 2005-06-21
6654373 Content aware network apparatus Robert Maher, Victor Bennett, Aswinkumar Vishanji Rana, Milton Andre Lie, Kevin William Brandon +1 more 2003-11-25
6381242 Content processor Robert Maher, Aswinkumar Vishanji Rana, Milton Andre Lie, Kevin William Brandon, Corey Alan Garrow 2002-04-30
6205560 Debug system allowing programmable selection of alternate debug mechanisms such as debug handler, SMI, or JTAG Mark Bluhm, Stanley D. Harder, William C. Patton, JR. 2001-03-20
6138230 Processor with multiple execution pipelines using pipe stage state information to control independent movement of instructions between pipe stages of an execution pipeline Steven C. McMahan, Mark Bluhm, Raul A. Garibay, Jr. 2000-10-24
6073231 Pipelined processor with microcontrol of register translation hardware Mark Bluhm 2000-06-06
5961575 Microprocessor having combined shift and rotate circuit David Brian Koch Erickson 1999-10-05
5838897 Debugging a processor using data output during idle bus cycles Mark Bluhm 1998-11-17
5835949 Method of identifying and self-modifying code Marc A. Quattromani, Raul A. Garibay, Jr., Steven C. McMahan 1998-11-10
5805879 In a pipelined processor, setting a segment access indicator during execution stage using exception handling Raul A. Garibay, Jr. 1998-09-08
5794026 Microprocessor having expedited execution of condition dependent instructions Ronald S. McMahon 1998-08-11
5742755 Error-handling circuit and method for memory address alignment double fault 1998-04-21
5644741 Processor with single clock decode architecture employing single microROM Mark Bluhm, Steven C. McMahan, Raul A. Garibay, Jr. 1997-07-01
5596735 Circuit and method for addressing segment descriptor tables Raul A. Garibay, Jr. 1997-01-21
5524222 Microsequencer allowing a sequence of conditional jumps without requiring the insertion of NOP or other instructions 1996-06-04
5471598 Data dependency detection and handling in a microprocessor with write buffer Marc A. Quattromani, Raul A. Garibay, Jr., Nital Patwa 1995-11-28