Issued Patents All Time
Showing 51–63 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7112975 | Advanced probe card and method of fabricating same | James E. Nulty | 2006-09-26 |
| 6847218 | Probe card with an adapter layer for testing integrated circuits | James E. Nulty, Brenor L. Brophy, Thomas A. McCleary, Qi Gu, Thurman J. Rodgers +1 more | 2005-01-25 |
| 6844237 | Method for improving dielectric polishing | Andrey V. Zagrebelny, Matthew Buchanan | 2005-01-18 |
| 6825544 | Method for shallow trench isolation and shallow trench isolation structure | — | 2004-11-30 |
| 6808944 | Structure and method for monitoring a semiconductor process, and method of making such a structure | Kaichiu Wong | 2004-10-26 |
| 6800495 | Lot-optimized wafer level burn-in | Cesar Payan | 2004-10-05 |
| 6759865 | Array of dice for testing integrated circuits | Qi Gu | 2004-07-06 |
| 6734108 | Semiconductor structure and method of making contacts in a semiconductor structure | Jianmin Qiao, Shahin Sharifzadeh | 2004-05-11 |
| 6593208 | Method of uniform polish in shallow trench isolation process | — | 2003-07-15 |
| 6534805 | SRAM cell design | — | 2003-03-18 |
| 6480406 | Content addressable memory cell | Manoj B. Roge | 2002-11-12 |
| 6461904 | Structure and method for making a notched transistor with spacers | Chan-Lon Yang | 2002-10-08 |
| 6350665 | Semiconductor structure and method of making contacts and source and/or drain junctions in a semiconductor device | Jianmin Qiao | 2002-02-26 |