Issued Patents All Time
Showing 25 most recent of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10944694 | Predictive arbitration circuit | Joseph G. Tietz | 2021-03-09 |
| 10721185 | Age-based arbitration circuit | Joseph G. Tietz | 2020-07-21 |
| 10592465 | Node controller direct socket group memory access | Frank R. Dropps | 2020-03-17 |
| 10521260 | Workload management system and process | Steven Dean, Michael S. Woodacre, Randal S. Passint, Thomas Edward McGee, Michael Malewicki +1 more | 2019-12-31 |
| 9250826 | Enhanced performance monitoring method and apparatus | — | 2016-02-02 |
| 9237093 | Bandwidth on-demand adaptive routing | Joseph G. Tietz, Gregory Michael Thorson | 2016-01-12 |
| 9208090 | Transactional memory proxy | — | 2015-12-08 |
| 9104343 | Global synchronous clock circuit and method for blade processors | Rodney Ruesch, Robert W. Cutler, Richard G. Finstad, Dale R. Purdy, Brian J. Johnson +1 more | 2015-08-11 |
| 8239566 | Non-saturating fairness protocol and method for NACKing systems | Gregory Michael Thorson | 2012-08-07 |
| 7587305 | Transistor level verilog | Robert James Lutz, Mark S. Birrittella, Harro Zimmermann | 2009-09-08 |
| 6925547 | Remote address translation in a multiprocessor system | Steven L. Scott, Chris Dickson, Michael Anderson | 2005-08-02 |
| 6839856 | Method and circuit for reliable data capture in the presence of bus-master changeovers | Rodney Ruesch | 2005-01-04 |
| 6779072 | Method and apparatus for accessing MMR registers distributed across a large asic | Mark F. Sauder, Michael Anderson | 2004-08-17 |
| 6604185 | Distribution of address-translation-purge requests to multiple processors | — | 2003-08-05 |
| 6119198 | Recursive address centrifuge for distributed memory massively parallel processing systems | — | 2000-09-12 |
| 6029212 | Method of handling arbitrary size message queues in which a message is written into an aligned block of external registers within a plurality of external registers | Richard E. Kessler, Steven M. Oberlin, Steven L. Scott | 2000-02-22 |
| 5835925 | Using external registers to extend memory reference capabilities of a microprocessor | Richard E. Kessler, Steven M. Oberlin, Steven L. Scott | 1998-11-10 |
| 5784706 | Virtual to logical to physical address translation for distributed memory massively parallel processing systems | Steven M. Oberlin, Randal S. Passint | 1998-07-21 |
| 5765181 | System and method of addressing distributed memory within a massively parallel processing system | Steven M. Oberlin, Janet M. Eberhart, Gary W. Elsesser, Thomas A. MacDonald, Douglas M. Pase +1 more | 1998-06-09 |
| 5696922 | Recursive address centrifuge for distributed memory massively parallel processing systems | — | 1997-12-09 |
| 5592487 | Communication protocol for transferring information across a serial communication link | Kevin M. Knecht | 1997-01-07 |
| 5581705 | Messaging facility with hardware tail pointer and software implemented head pointer message queue for distributed memory massively parallel processing system | Randal S. Passint, Steven M. Oberlin | 1996-12-03 |
| 5434995 | Barrier synchronization for distributed memory massively parallel processing systems | Steven M. Oberlin | 1995-07-18 |
| 5420583 | Fiber optic channel extender interface method and apparatus | Kevin M. Knecht | 1995-05-30 |
| 5390041 | Fiber optic channel extender interface method and apparatus | Kevin M. Knecht | 1995-02-14 |