Issued Patents All Time
Showing 26–44 of 44 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9355206 | System and method for automated functional coverage generation and management for IC design protocols | Shahid Ikram, Isam Akkawi, John M. Perveiler, James Ellis | 2016-05-31 |
| 9330002 | Multi-core interconnect in a network processor | Richard E. Kessler, John M. Perveiler, Bradley Dobbie | 2016-05-03 |
| 9141548 | Method and apparatus for managing write back cache | Gregg A. Bouchard, Richard E. Kessler, Robert A. Sanzone | 2015-09-22 |
| 9058463 | Systems and methods for specifying. modeling, implementing and verifying IC design protocols | Shahid Ikram, Isam Akkawi, John M. Perveiler, James Ellis | 2015-06-16 |
| 9026312 | Ergonomics test buck | Todd Bartholomew Smith, Darin Patrick Brodie, David Hopp, Robert Lewis, Casey Boyer +3 more | 2015-05-05 |
| 8595401 | Input output bridging | Robert A. Sanzone, Richard E. Kessler | 2013-11-26 |
| 8473658 | Input output bridging | Robert A. Sanzone, Richard E. Kessler | 2013-06-25 |
| 7941585 | Local scratchpad and data caching system | David A. Carlson, Richard E. Kessler | 2011-05-10 |
| 7606998 | Store instruction ordering for multi-core processor | Richard E. Kessler, Yen Lee | 2009-10-20 |
| 7370151 | Method and system for absorbing defects in high performance microprocessor with a large n-way set associative cache | Brian P. Lilly, Joel Grodstein, Patrick FitzGerald | 2008-05-06 |
| 7213087 | Mechanism to control the allocation of an N-source shared buffer | Michael Bertone, Richard E. Kessler, Steve Lang | 2007-05-01 |
| 6918015 | Scalable directory based cache coherence protocol | Richard E. Kessler, Kourosh Gharachorloo | 2005-07-12 |
| 6681295 | Fast lane prefetching | Stephen C. Root, Richard E. Kessler, Brian P. Lilly | 2004-01-20 |
| 6671822 | Method and system for absorbing defects in high performance microprocessor with a large n-way set associative cache | Brian P. Lilly, Joel Grodstein, Patrick FitzGerald | 2003-12-30 |
| 6654858 | Method for reducing directory writes and latency in a high performance, directory-based, coherency protocol | Brian P. Lilly, Richard E. Kessler, Michael Bertone | 2003-11-25 |
| 6633960 | Scalable directory based cache coherence protocol | Richard E. Kessler, Kourosh Gharachorloo | 2003-10-14 |
| 6212493 | Profile directed simulation used to target time-critical crossproducts during random vector testing | James D. Huggins, James B. Keller | 2001-04-03 |
| 6148427 | Method and apparatus for test data generation | William H. Sherwood, Jr., Michael Kantrowitz | 2000-11-14 |
| 5878054 | Method and apparatus for test data generation | William H. Sherwood, Jr., Michael Kantrowitz | 1999-03-02 |