Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12412014 | IC chip with IC design modification detection | Vivek Chickermane, Brian Foutz, Krishna Vijaya Chakravadhanula | 2025-09-09 |
| 12307186 | Launch off shift process | Puneet Arora, Subhasish Mukherjee, Sarthak Singhal, Brian Foutz, Krishna Vijaya Chakravadhanula | 2025-05-20 |
| 12007440 | Systems and methods for scan chain stitching | Puneet Arora, Subhasish Mukherjee, Sarthak Singhal, Brian Foutz, Krishna Vijaya Chakravadhanula +2 more | 2024-06-11 |
| 11947887 | Test-point flop sharing with improved testability in a circuit design | Krishna Vijaya Chakravadhanula, Brian Foutz, Prateek Kumar Rai, Sarthak Singhal, Vivek Chickermane | 2024-04-02 |
| 10955470 | Method to improve testability using 2-dimensional exclusive or (XOR) grids | Brian Foutz, Vivek Chickermane, Krishna Vijaya Chakravadhanula | 2021-03-23 |
| 10775435 | Low-power shift with clock staggering | Brian Foutz, Vivek Chickermane, Krishna Vijaya Chakravadhanula | 2020-09-15 |
| 10761131 | Method for optimally connecting scan segments in two-dimensional compression chains | Brian Foutz, Vivek Chickermane, Krishna Vijaya Chakravadhanula | 2020-09-01 |
| 10331506 | SoC top-level XOR compactor design to efficiently test and diagnose multiple identical cores | Vivek Chickermane, Krishna Vijaya Chakravadhanula, Brian Foutz | 2019-06-25 |